Michelly De SouzaMarcelo Antonio PavanelloFLANDRE, D.2022-01-122022-01-122012-03-17DE SOUZA, M.; PAVANELLO, M. A. ; FLANDRE, D. Analog performance of asymmetric self-cascode p-channel fully depleted SOI transistors. 2012 8th International Caribbean Conference on Devices, Circuits and Systems, ICCDCS 2012. March, 2012.https://repositorio.fei.edu.br/handle/FEI/4145This work presents an analysis of the analog performance of asymmetric threshold voltage self-cascode fully depleted (FD) p-type SOI transistors. The experimental results showed that this structure is able to improve the devices transconductance and output conductance, resulting in increased intrinsic voltage gain and breakdown voltage in comparison to single transistors and the conventional symmetric self-cascode. © 2012 IEEE.Acesso RestritoArtigo de evento10.1109/ICCDCS.2012.6188932Analog ParametersMOSFETSelf-Cascode TransistorSilicon-On-Insulator