De Souza M.Pavanello M.A.Trevisoli R.D.Doria R.T.Colinge J.-P.2019-08-192019-08-192011DE SOUZA, Michelly; PAVANELLO, Marcelo A.; PAVANELLO, M. A.; TREVISOLI, Renan Doria; DORIA, Rodrigo Trevisoli; COLINGE, J. -P.. Cryogenic Operation of Junctionless Nanowire Transistor. IEEE Electron Device Letters (Print), v. 32, n. 10, p. 1322-1324, 2011.0741-3106https://repositorio.fei.edu.br/handle/FEI/1087This letter presents the properties of nMOS junctionless nanowire transistors (JNTs) under cryogenic operation. Experimental results of drain current, subthreshold slope, maximum transconductance at low electric field, and threshold voltage, as well as its variation with temperature, are presented. Unlike in classical devices, the drain current of JNTs decreases when temperature is lowered, although the maximum transconductance increases when the temperature is lowered down to 125 K. An analytical model for the threshold voltage is proposed to explain the influence of nanowire width and doping concentration on its variation with temperature. It is shown that the wider the nanowire or the lower the doping concentration, the higher the threshold voltage variation with temperature. © 2011 IEEE.Acesso RestritoArtigo10.1109/LED.2011.2161748Junctionless transistorlow temperaturenanowire transistorsilicon-on-insulator (SOI)threshold voltage model