CONTRERAS, E.CERDEIRA, A.Marcelo Antonio Pavanello2022-01-122022-01-122012-03-17CONTRERAS, E.; CERDEIRA, A.; PAVANELLO, M. A. Simulation of miller OpAmp analog circuit with FinFET transistors. 2012 8th International Caribbean Conference on Devices, Circuits and Systems, ICCDCS 2012. March. 2012.https://repositorio.fei.edu.br/handle/FEI/4144In this paper we present a methodology to use the Symmetric Doped Double-Gate Model implemented in Verilog-A to simulate analog circuits with FinFET Technology. A Miller operational Amplifier was simulated in SPICE simulator and the results were validated comparing them with experimental data published in previous works. © 2012 IEEE.Acesso RestritoArtigo de evento10.1109/ICCDCS.2012.6188898FinFETMiller OpAmpSDDGMVerilog-A