D'OLIVEIRA, L. M.FLANDRE, D.Marcelo Antonio PavanelloMichelly De Souza2022-01-122022-01-122014-10-29D'OLIVEIRA, L. M.; FLANDRE, D.; PAVANELLO, M. A.; DE SOUZA, M. Effect of high temperature on analog parameters of Asymmetric Self-Cascode SOI nMOSFETs. 2014 29th Symposium on Microelectronics Technology and Devices: Chip in Aracaju, SBMicro 2014, Oct. 2014.https://repositorio.fei.edu.br/handle/FEI/3998This paper presents an analysis on the high temperature operation of Silicon-on-Insulator (SOI) nMOSFETs in Asymmetric Self-Cascode (A-SC) configuration. For this analysis, experimental results in the range of 300K to 500K of A-SC structures with different channel lengths for both the drain side transistor (MD) and source side transistor (MS) are used. The effect of varying channel length under high temperatures on the A-SC association is evaluated using as figure of merit important analog parameters, such as the intrinsic voltage gain and transconductance over drain current ratio.Acesso RestritoEffect of high temperature on analog parameters of Asymmetric Self-Cascode SOI nMOSFETsArtigo de evento10.1109/SBMicro.2014.6940135Analog parametersAsymmetric self-cascodeHigh temperaturesSOI nMOSFET