Please use this identifier to cite or link to this item: https://repositorio.fei.edu.br/handle/FEI/1344
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dc.contributor.authorITOCAZU, VITOR TATSUO
dc.contributor.authorALMEIDA, LUCIANO MENDES
dc.contributor.authorSonnenberg, Victor
dc.contributor.authorAGOPIAN, PAULA GHEDINI DER
dc.contributor.authorBARRAUD, SYLVAIN
dc.contributor.authorVINET, MAUD
dc.contributor.authorFAYNOT, OLIVER
dc.contributor.authorMARTINO, JOAO ANTONIO
dc.date.accessioned2019-08-19T23:45:33Z-
dc.date.available2019-08-19T23:45:33Z-
dc.date.issued2019
dc.identifier.citationITOCAZU, VITOR TATSUO; ALMEIDA, LUCIANO MENDES; Sonnenberg, Victor; AGOPIAN, PAULA GHEDINI DER; BARRAUD, SYLVAIN; VINET, MAUD; FAYNOT, OLIVER; MARTINO, JOAO ANTONIO. Comparison between nMOS and pMOS Ω-Gate Nanowire down to 10 nm width as a function of back gate bias. SEMICONDUCTOR SCIENCE AND TECHNOLOGY, v. 34, n. 3, p. 035003, 2019.
dc.identifier.issn0268-1242
dc.identifier.urihttps://repositorio.fei.edu.br/handle/FEI/1344-
dc.relation.ispartofSEMICONDUCTOR SCIENCE AND TECHNOLOGY
dc.rightsAcesso Aberto
dc.titleComparison between nMOS and pMOS Ω-Gate Nanowire down to 10 nm width as a function of back gate biaspt_BR
dc.typeArtigopt_BR
dc.identifier.doi10.1088/1361-6641/aafccc
dc.description.volume34
dc.description.issuenumber3
dc.description.firstpage035003
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