Repositório do Conhecimento Institucional do Centro Universitário FEI
 

Engenharia Elétrica

URI permanente desta comunidadehttps://repositorio.fei.edu.br/handle/FEI/21

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Resultados da Pesquisa

Agora exibindo 1 - 2 de 2
  • Artigo de evento 1 Citação(ões) na Scopus
    Asymmetric self-cascode FD SOI nMOSFETS harmonic distortion at cryogenic temperatures
    (2014-07-09) D'OLIVEIRA, L. M.; Rodrido Doria; Marcelo Antonio Pavanello; Michelly De Souza; KILCHYTSHA, V.; FLANDRE, D.
    This paper presents an analysis on the linearity of Asymmetric Self-Cascode (A-SC) of FD SOI nMOSGET transistors at cryogenic temperatures. This is achieved by evaluating experimental results of associations of transistors with various combinations of channel doping, obtained at temperatures ranging between liquid helium temperature (LHT, 4K) and room temperature (300K). It has been observed that A-SC presents better analog characteristics than the Symmetric Self-Cascode (S-SC) even at temperatures below 100K. The results show improved harmonic distortion at cryogenic temperatures and for structures composed by transistors with lower channel doping. © 2014 IEEE.
  • Artigo de evento 0 Citação(ões) na Scopus
    Effect of high temperature on analog parameters of Asymmetric Self-Cascode SOI nMOSFETs
    (2014-10-29) D'OLIVEIRA, L. M.; FLANDRE, D.; Marcelo Antonio Pavanello; Michelly De Souza
    This paper presents an analysis on the high temperature operation of Silicon-on-Insulator (SOI) nMOSFETs in Asymmetric Self-Cascode (A-SC) configuration. For this analysis, experimental results in the range of 300K to 500K of A-SC structures with different channel lengths for both the drain side transistor (MD) and source side transistor (MS) are used. The effect of varying channel length under high temperatures on the A-SC association is evaluated using as figure of merit important analog parameters, such as the intrinsic voltage gain and transconductance over drain current ratio.