Engenharia Elétrica
URI permanente desta comunidadehttps://repositorio.fei.edu.br/handle/FEI/21
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3 resultados
Resultados da Pesquisa
- Temperature, Silicon Thickness and Intrinsic Length Influence on the Operation of Lateral SOI PIN Photodiodes(2020-08-11) RODRIGUES, EDSON JOSÉ; Michelly De SouzaThis work presents an analysis of the influence of intrinsic length region and the thickness of the silicon film on the performance of lateral thin-film SOI PIN (Silicon on insulator P-I-N photodiodes) when illuminated by low wavelengths, in the blue and ultraviolet (UV) range. The experimental measurements performed with the wavelengths of 396 nm, 413 nm, and 460 nm in a temperature range of 100 K to 400 K showed that the optical responsivity of the SOI PIN photodetectors has larger dependence on the incident wavelength than on the variation of temperature. Two-dimensional numerical simulations showed the same trends as the experimental results as a function of temperature and as a function of wavelength. Numerical simulations were used to investigate the responsivity and total quantum efficiency of PIN SOI photodetectors with intrinsic length region ranging from 5 μm to 30 μm and silicon film thickness ranging between 40 nm to 500 nm. From the results it can be concluded that by properly choosing intrinsic length and silicon film thickness it is possible to optimize PIN SOI photodiodes performance for detecting specific wavelengths that can help defining the best technology for detection of a given wavelength.
- Analysis of Current Mirrors with Asymmetric Self-Cascode Association of SOI MOSFETs through SPICE Simulations(2020-07-31) SILVA, PAULO RODRIGUES; Michelly De Souza
- Analysis of Mobility in Graded-Channel SOI Transistors aiming at Circuit Simulation(2020-07-31) SILVA, LUCAS MOTA BARBOSA DA; PAZ, BRUNA CARDOSO; Michelly De SouzaThis work presents an analysis of the behavior of the effective mobility of graded-channel FD SOI transistors us-ing an Y-Function-based technique. Low field mobility, linear and quadratic attenuation factors were extracted from two-di-mensional numerical simulations. The influence of the length of both channel regions over these parameters was analyzed. The parameters extracted from experimental data were used in a SPICE simulator, showing that it is possible to simulated GC SOI MOSFET using a regular SOI MOSFET model, by adjust-ing its parameters. This approach presents a percentage error smaller than 7.91% for low VDS.