Artigos
URI permanente para esta coleçãohttps://repositorio.fei.edu.br/handle/FEI/798
Navegar
2 resultados
Resultados da Pesquisa
- Asymmetric self-cascode current-voltage constructing algorithm for analog figures-of-merit extraction(2018-08-31) D' OLIVEIRA, L. M.; Michelly De Souza; KILCHYTSKA, V.; FLANDRE. D.© 2018 IEEE.This paper proposes an analysis of a self-cascode IV constructing algorithm for the extraction of DC analog figures of merit, namely the transconductance, output conductance and intrinsic voltage gain. The algorithm was applied on input tables of measured single Fully-depleted Silicon on Insulator (FDSOI) nMOSFETs and was validated on the measured self-cascode association of these devices. The results show an appropriate accuracy, that reflect trends and values with low error.
- Numerical simulation and analysis of transistor channel length and doping mismatching in GC SOI nMOSFETs analog figures of merit(2018-08-31) ALVES, C. R.; Michelly De Souza; FLANDRE, D.© 2018 IEEE.This paper presents a two-dimensional numerical simulation study of mismatching on the analog characteristics of fully-depleted graded-channel (GC) SOI MOSFET. The study aims at identifying the mismatching sources that affect the analog performance of GC SOI transistors. The simulations were performed imposing length and doping concentration variations and analyzing its impact on important electrical parameters such as threshold voltage and subthreshold slope, as well as analog parameters, namely transconductance, output conductance, Early voltage and intrinsic voltage gain.