Engenharia Elétrica
URI permanente desta comunidadehttps://repositorio.fei.edu.br/handle/FEI/21
Navegar
2 resultados
Resultados da Pesquisa
- Analog performance of strained SOI nanowires down to 10K(2016-09-15) PAZ, B. C.; Marcelo Antonio Pavanello; CASSE, M.; BARRAUD, S.; REIMBOLD, G.; VINET, M.; FAYNOT, O.This work presents the analog performance of strained SOI nanowires for the first time. Triple gate MOSFETs made in strained and unstrained SOI material with variable fin widths from quasi-planar transistors to nanowires with aggressively scaled fin width are compared using experimental results in the temperature range of 300K down to 10K. Intrinsic voltage gain, transconductance and output conductance are the main figures of merit in this work. Transport characteristics are investigated showing that mobility behavior is the major responsible for the analog parameters dependence on temperature.
- Compact Analytical Model for Trap-Related Low Frequency Noise in Junctionless Transistors(2019-09-26) TREVISOLI, R.; Rodrigo Doria; BARRAUD, S.; Marcelo Antonio PavanelloThe aim of this work is to propose a compact analytical model for the Low Frequency Noise (LFN) in Junctionless Nanowire Transistors (JNTs). Since JNTs work differently from inversion mode transistors, the noise is also expected to behave differently. To the best of our knowledge, no analytical models have been presented for LFN in these devices. The proposed model is validated through numerical simulations. Experimental results are also used to demonstrate its applicability.