Extraction of the interface trap density energetic distribution in SOI Junctionless Nanowire Transistors

Página do item simplificado
dc.contributor.authorTrevisoli R.
dc.contributor.authorDoria R.T.
dc.contributor.authorDe Souza M.
dc.contributor.authorPavanello M.A.
dc.date.accessioned2019-08-19T23:45:11Z
dc.date.available2019-08-19T23:45:11Z
dc.date.issued2015
dc.description.abstract© 2015 Elsevier B.V. All rights reserved.Abstract This work proposes a method for extracting the energetic distribution of the interface trap density at the gate dielectric in Junctionless silicon Nanowire Transistors. The proposed method uses the subthreshold slope extraction combined with the substrate bias in order to induce a variation in the channel potential, such that the interface trap density can be extracted for a significant energy range. Three-dimensional TCAD numerical simulations have been performed to analyze the accuracy of the proposed method considering different concentrations and trap density profiles (uniform and exponential). The influence of the device width variation on the trap energy determination has been analyzed, showing that only for positive substrate biases the energy might be affected. The method precision was also analyzed, showing that the trap density extraction is only effectively affected for low N<inf>it</inf> values, which do not influence significantly the device performance. Finally, the method has been applied to experimental transistors with high-κ and silicon dioxide gate dielectrics showing consistent results.
dc.description.firstpage23
dc.description.issuenumber1
dc.description.lastpage26
dc.description.volume147
dc.identifier.citationTREVISOLI, Renan Doria; DORIA, Rodrigo Trevisoli; DE SOUZA, Michelly; Pavanello, Marcelo Antonio. Extraction of the interface trap density energetic distribution in SOI Junctionless Nanowire Transistors. Microelectronic Engineering, v. 147, n. 1, p. 23-26, 2015.
dc.identifier.doi10.1016/j.mee.2015.04.040
dc.identifier.issn0167-9317
dc.identifier.urihttps://repositorio.fei.edu.br/handle/FEI/1104
dc.relation.ispartofMicroelectronic Engineering
dc.rightsAcesso Restrito
dc.subject.otherlanguageEffective trap density
dc.subject.otherlanguageElectrical characterization
dc.subject.otherlanguageEnergetic distribution
dc.subject.otherlanguageExtraction method
dc.subject.otherlanguageJunctionless Nanowire Transistors
dc.titleExtraction of the interface trap density energetic distribution in SOI Junctionless Nanowire Transistors
dc.typeArtigo
fei.scopus.citations11
fei.scopus.eid2-s2.0-84927739380
fei.scopus.subjectElectrical characterization
fei.scopus.subjectEnergetic distribution
fei.scopus.subjectExtraction method
fei.scopus.subjectNanowire transistors
fei.scopus.subjectTrap density
fei.scopus.updated2024-07-01
fei.scopus.urlhttps://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=84927739380&origin=inward
Arquivos
Coleções
Artigos