Analytical model for the dynamic behavior of triple-gate junctionless nanowire transistors
dc.contributor.author | Trevisoli R. | |
dc.contributor.author | Doria R.T. | |
dc.contributor.author | De Souza M. | |
dc.contributor.author | Barraud S. | |
dc.contributor.author | Vinet M. | |
dc.contributor.author | Pavanello M.A. | |
dc.date.accessioned | 2019-08-19T23:45:11Z | |
dc.date.available | 2019-08-19T23:45:11Z | |
dc.date.issued | 2016 | |
dc.description.abstract | © 2015 IEEE.This paper presents an analytical model for the intrinsic capacitances and transconductances of triple-gate junctionless nanowire transistors. The model is based on a surface-potential drain current model, which includes shortchannel effects, and accounts for the dependences on the device dimensions, doping concentration, and quantum effects. It is validated with 3-D Technology Computer-Aided Design (TCAD) simulations for several device characteristics and biases as well as with the experimental results. | |
dc.description.firstpage | 856 | |
dc.description.issuenumber | 2 | |
dc.description.lastpage | 863 | |
dc.description.volume | 63 | |
dc.identifier.citation | TREVISOLI, RENAN; Doria, Rodrigo Trevisoli; DE SOUZA, Michelly; BARRAUD, SYLVAIN; VINET, MAUD; Pavanello, Marcelo Antonio. Analytical Model for the Dynamic Behavior of Triple-Gate Junctionless Nanowire Transistors. IEEE TRANSACTIONS ON ELECTRON DEVICES, v. 63, n. 2, p. 856-863, 2016. | |
dc.identifier.doi | 10.1109/TED.2015.2507571 | |
dc.identifier.issn | 0018-9383 | |
dc.identifier.uri | https://repositorio.fei.edu.br/handle/FEI/1112 | |
dc.relation.ispartof | IEEE Transactions on Electron Devices | |
dc.rights | Acesso Restrito | |
dc.subject.otherlanguage | Intrinsic capacitances | |
dc.subject.otherlanguage | Junctionless nanowire transistors (JNTs) | |
dc.subject.otherlanguage | Modeling | |
dc.subject.otherlanguage | Transconductances | |
dc.title | Analytical model for the dynamic behavior of triple-gate junctionless nanowire transistors | |
dc.type | Artigo | |
fei.scopus.citations | 21 | |
fei.scopus.eid | 2-s2.0-84958231575 | |
fei.scopus.subject | Device characteristics | |
fei.scopus.subject | Doping concentration | |
fei.scopus.subject | Drain current models | |
fei.scopus.subject | Dynamic behaviors | |
fei.scopus.subject | Intrinsic capacitance | |
fei.scopus.subject | Nanowire transistors | |
fei.scopus.subject | Short-channel effect | |
fei.scopus.subject | Technology computer aided design | |
fei.scopus.updated | 2024-11-01 | |
fei.scopus.url | https://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=84958231575&origin=inward |