Effect of the back bias on the analog performance of standard FD and UTBB transistors-based self-cascode structures
dc.contributor.author | Doria R.T. | |
dc.contributor.author | Flandre D. | |
dc.contributor.author | Trevisoli R. | |
dc.contributor.author | De Souza M. | |
dc.contributor.author | Pavanello M.A. | |
dc.date.accessioned | 2019-08-19T23:45:13Z | |
dc.date.available | 2019-08-19T23:45:13Z | |
dc.date.issued | 2017 | |
dc.description.abstract | © 2017 IOP Publishing Ltd.This work demonstrates that active back biasing can improve significantly the analog performance of two-transistors self-cascode structures. The study was performed by applying both standard and UTBB fully depleted (FD) SOI MOSFETs to the structures and has shown that a voltage gain improvement of about 7 dB is obtained when a forward back bias is applied to the drain-sided transistor of standard FD devices-based structure. In the case of UTBB transistors, an improvement larger than 5 dB of the output voltage gain is shown depending on the back bias applied to both n- or p-type devices. Finally, it is shown that the mirroring precision of current mirrors composed by SC structures can be more than 20% better than the one composed by single devices and the improvement is better when adequate back bias is applied. | |
dc.description.firstpage | 1 | |
dc.description.issuenumber | 9 | |
dc.description.lastpage | 10 | |
dc.description.volume | 32 | |
dc.identifier.citation | DORIA, R.T.; FLANDRE, D.; TREVISOLI, R D; DE SOUZA, Michelly; PAVANELLO, M. A.. Effect of the Back Bias on the Analog Performance of Standard FD and UTBB Transistors-Based Self-Cascode Structures. Semiconductor Science and Technology, v. 32, p. 1-10, 2017. | |
dc.identifier.doi | 10.1088/1361-6641/aa7659 | |
dc.identifier.issn | 1361-6641 | |
dc.identifier.uri | https://repositorio.fei.edu.br/handle/FEI/1129 | |
dc.relation.ispartof | Semiconductor Science and Technology | |
dc.rights | Acesso Restrito | |
dc.subject.otherlanguage | current mirrors | |
dc.subject.otherlanguage | self-cascode | |
dc.subject.otherlanguage | silicon-on-insulator | |
dc.subject.otherlanguage | UTBB | |
dc.title | Effect of the back bias on the analog performance of standard FD and UTBB transistors-based self-cascode structures | |
dc.type | Artigo | |
fei.scopus.citations | 3 | |
fei.scopus.eid | 2-s2.0-85028755305 | |
fei.scopus.subject | Analog performance | |
fei.scopus.subject | Current mirrors | |
fei.scopus.subject | Fully depleted | |
fei.scopus.subject | Output voltages | |
fei.scopus.subject | SC structures | |
fei.scopus.subject | Self-cascode | |
fei.scopus.subject | UTBB | |
fei.scopus.subject | Voltage gain | |
fei.scopus.updated | 2025-02-01 | |
fei.scopus.url | https://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=85028755305&origin=inward |