Threshold voltages of SOI MuGFETs
dc.contributor.author | de Andrade M.G.C. | |
dc.contributor.author | Martino J.A. | |
dc.date.accessioned | 2022-01-12T22:04:52Z | |
dc.date.available | 2022-01-12T22:04:52Z | |
dc.date.issued | 2008-12-05 | |
dc.description.abstract | The multiple-gate field-effect transistor (MuGFET) is a device with a gate folded on different sides of the channel region. They are one of the most promising technological solutions to create high-performance ultra-scaled SOI CMOS. In this work, the behavior of the threshold voltage in double-gate, triple-gate and quadruple-gate SOI transistors with different channel doping concentrations is studied through three-dimensional numerical simulation. The results indicated that for double-gate transistors, one or two threshold voltages can be observed, depending on the channel doping concentration. However, in triple-gate and quadruple-gate it is possible to observe up to four threshold voltages due to the corner effect and the different doping concentration between the top and bottom of the Fin. © 2008 Elsevier Ltd. All rights reserved. | |
dc.description.firstpage | 1877 | |
dc.description.issuenumber | 12 | |
dc.description.lastpage | 1883 | |
dc.description.volume | 52 | |
dc.identifier.citation | DE ANDRADE, M. G. C.; MARTINO, J. A. Threshold voltages of SOI MuGFETs. Solid-State Electronics, v. 52, n. 12, p. 1877-1883, Dec. 2008. | |
dc.identifier.doi | 10.1016/j.sse.2008.06.046 | |
dc.identifier.issn | 0038-1101 | |
dc.identifier.uri | https://repositorio.fei.edu.br/handle/FEI/4300 | |
dc.relation.ispartof | Solid-State Electronics | |
dc.rights | Acesso Restrito | |
dc.subject.otherlanguage | Double-gate | |
dc.subject.otherlanguage | MuGFET | |
dc.subject.otherlanguage | Quadruple-gate | |
dc.subject.otherlanguage | SOI | |
dc.subject.otherlanguage | Threshold voltage | |
dc.subject.otherlanguage | Triple-gate | |
dc.title | Threshold voltages of SOI MuGFETs | |
dc.type | Artigo | |
fei.scopus.citations | 15 | |
fei.scopus.eid | 2-s2.0-56049114185 | |
fei.scopus.subject | Double-gate | |
fei.scopus.subject | MuGFET | |
fei.scopus.subject | Quadruple-gate | |
fei.scopus.subject | SOI | |
fei.scopus.subject | Triple-gate | |
fei.scopus.updated | 2025-02-01 | |
fei.scopus.url | https://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=56049114185&origin=inward |