Influence of fin width on the intrinsic voltage gain of standard and strained triple-gate nFinFETs
dc.contributor.author | Marcelo Antonio Pavanello | |
dc.contributor.author | MARTINO, J. A. | |
dc.contributor.author | SIMOEN, E. | |
dc.contributor.author | ROOYACKERS, R. | |
dc.contributor.author | COLLAERT, N. | |
dc.contributor.author | CLAEYS, C. | |
dc.contributor.authorOrcid | https://orcid.org/0000-0003-1361-3650 | |
dc.date.accessioned | 2022-01-12T22:04:49Z | |
dc.date.available | 2022-01-12T22:04:49Z | |
dc.date.issued | 2008-09-04 | |
dc.description.abstract | This work studies the influence of the fin width on the intrinsic voltage gain of standard and strained Si (sSOI) n-type triple-gate FinFETs with high-k dielectrics and metal gate. It is demonstrated that independent of the fin width the application of strain improves the device transconductance. On the other hand, the device output conductance shows a high dependence on the fin width in strained FinFETs with respect to standard ones. The output conductance degrades if narrow fins are used and improves for wide fins. Narrow strained FinFETs show a degradation of the Early voltage compared to standard ones suggesting that strained devices are more subjected to the channel length modulation effect. © The Electrochemical Society. | |
dc.description.firstpage | 253 | |
dc.description.issuenumber | 1 | |
dc.description.lastpage | 261 | |
dc.description.volume | 14 | |
dc.identifier.citation | PAVANELLO, M. A.; MARTINO, J. A.; SIMOEN, E.; ROOYACKERS, R.; COLLAERT, N.; CLAEYS, C. Influence of fin width on the intrinsic voltage gain of standard and strained triple-gate nFinFETs. ECS Transactions, v. 14, n. 1, p. 253-261, Sept. 2009. | |
dc.identifier.doi | 10.1149/1.2956039 | |
dc.identifier.issn | 1938-5862 | |
dc.identifier.uri | https://repositorio.fei.edu.br/handle/FEI/4297 | |
dc.relation.ispartof | ECS Transactions | |
dc.rights | Acesso Restrito | |
dc.title | Influence of fin width on the intrinsic voltage gain of standard and strained triple-gate nFinFETs | |
dc.type | Artigo de evento | |
fei.scopus.citations | 0 | |
fei.scopus.eid | 2-s2.0-57749170945 | |
fei.scopus.subject | Channel length modulations | |
fei.scopus.subject | Early voltages | |
fei.scopus.subject | Fin widths | |
fei.scopus.subject | Finfets | |
fei.scopus.subject | High-k dielectrics | |
fei.scopus.subject | Metal gates | |
fei.scopus.subject | Output conductances | |
fei.scopus.subject | Voltage gains | |
fei.scopus.subject | Work studies | |
fei.scopus.updated | 2024-12-01 | |
fei.scopus.url | https://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=57749170945&origin=inward |