Modeling of Thin-Film Lateral SOI PIN Diodes with an Alternative Multi-Branch Explicit Current Model

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dc.contributor.authorLUGO-MUÑOZ, D.
dc.contributor.authorMUCI, Juan
dc.contributor.authorORTIZ-CONDE, Adelmo
dc.contributor.authorGARCIA-SANCHEZ, Francisco
dc.contributor.authorDE SOUZA, Michelly
dc.contributor.authorFLANDRE, Denis
dc.contributor.authorPavanello, Marcelo Antonio
dc.date.accessioned2019-08-19T23:45:10Z
dc.date.available2019-08-19T23:45:10Z
dc.date.issued2012
dc.description.firstpage92
dc.description.issuenumber2
dc.description.lastpage99
dc.description.volume7
dc.identifier.citationLUGO-MUÑOZ, D.; MUCI, Juan; ORTIZ-CONDE, Adelmo; GARCIA-SANCHEZ, Francisco; DE SOUZA, Michelly; FLANDRE, Denis; Pavanello, Marcelo Antonio. Modeling of Thin-Film Lateral SOI PIN Diodes with an Alternative Multi-Branch Explicit Current Model. JICS. Journal of Integrated Circuits and Systems (Ed. Português), v. 7, n. 2, p. 92-99, 2012.
dc.identifier.issn1807-1953
dc.identifier.urihttps://repositorio.fei.edu.br/handle/FEI/1094
dc.relation.ispartofJICS. Journal of Integrated Circuits and Systems (Ed. Português)
dc.rightsAcesso Restrito
dc.titleModeling of Thin-Film Lateral SOI PIN Diodes with an Alternative Multi-Branch Explicit Current Modelpt_BR
dc.typeArtigopt_BR
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