Using cynthia SOI MOSFET to improve voltage gain of analog integrated circuits

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dc.contributor.authorOLIVEIRA, D. R.
dc.contributor.authorSalvador Gimenez
dc.contributor.authorOrcidhttps://orcid.org/0000-0002-3616-9559
dc.date.accessioned2022-01-12T22:04:28Z
dc.date.available2022-01-12T22:04:28Z
dc.date.issued2009-09-03
dc.description.abstractTheoretically, the surrounding gate SOI MOSFET presents the best possible control of gate region and consequently the best possible Electrostatic Integrity. Cynthia (circular-section) and Pillar (square-section) surrounding gate SOI MOSFETs are examples of this kind of structure. In this paper is performed a comparative study, by 3D numerical simulations, between Cynthia and Pillar surrounding gate SOI MOSFETs, focusing on analog integrated circuits applications, by studying the transconductance over drain current ratio behavior, regarding the same aspect ratio and bias conditions. Both, conventional and Graded-Channel technologies are regarded in this work. It is shown that Cynthia approach allows a voltage gain improvement of up to approximately 10% and 20% in comparison to Pillar surrounding gate SOI nMOSFET, when biased in weak and moderate inversion regimes, respectively. © The Electrochemical Society.
dc.description.firstpage381
dc.description.issuenumber1
dc.description.lastpage388
dc.description.volume23
dc.identifier.citationOLIVEIRA, D. R.; GIMENEZ, S. Using cynthia SOI MOSFET to improve voltage gain of analog integrated circuits. ECS Transactions, v. 23, n. 1, p. 381-388, Sept. 2009.
dc.identifier.doi10.1149/13183742
dc.identifier.issn1938-5862
dc.identifier.urihttps://repositorio.fei.edu.br/handle/FEI/4273
dc.relation.ispartofECS Transactions
dc.rightsAcesso Restrito
dc.titleUsing cynthia SOI MOSFET to improve voltage gain of analog integrated circuits
dc.typeArtigo de evento
fei.scopus.citations2
fei.scopus.eid2-s2.0-74549180546
fei.scopus.subject3-D numerical simulation
fei.scopus.subjectAnalog integrated circuit
fei.scopus.subjectBias conditions
fei.scopus.subjectComparative studies
fei.scopus.subjectElectrostatic integrity
fei.scopus.subjectGate region
fei.scopus.subjectModerate inversion
fei.scopus.subjectNMOSFET
fei.scopus.subjectSOI-MOSFETs
fei.scopus.subjectSurrounding-gate
fei.scopus.subjectVoltage gain
fei.scopus.updated2024-02-01
fei.scopus.urlhttps://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=74549180546&origin=inward
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