Channel width influence on the analog performance of the asymmetric self-cascode FD SOI nMOSFETs
N/D
Tipo de produção
Artigo de evento
Data de publicação
2017-09-01
Texto completo (DOI)
Periódico
SBMicro 2017 - 32nd Symposium on Microelectronics Technology and Devices: Chip on the Sands, co-located Symposia: 30th SBCCI - Circuits and Systems Design, 2nd INSCIT - Electronic Instrumentation, 7th WCAS - IC Design Cases and 17th SForum - Undergraduate-Student Forum
Editor
Texto completo na Scopus
Citações na Scopus
1
Autores
ASSALTI, R.
Michelly De Souza
FLANDRE, D.
Orientadores
Resumo
© 2017 IEEE.In this paper, the analog performance of the Asymmetric Self-Cascode structure of Fully Depleted SOI nMOSFETs has been evaluated with regards to the variation of channel width, through three-dimensional numerical simulations. The largest gain has been obtained using the narrowest transistor near the source and the widest transistor near the drain.
Citação
ASSALTI, R.; DE SOUZA, M.; FLANDRE, D. Channel width influence on the analog performance of the asymmetric self-cascode FD SOI nMOSFETs. SBMicro 2017 - 32nd Symposium on Microelectronics Technology and Devices: Chip on the Sands, co-located Symposia: 30th SBCCI - Circuits and Systems Design, 2nd INSCIT - Electronic Instrumentation, 7th WCAS - IC Design Cases and 17th SForum - Undergraduate-Student Forum, Sept. 2017.
Palavras-chave
Keywords
analog performance; asymmetric self-cascode; channel width; FD SOI nMOSFETs; numerical simulations
Assuntos Scopus
Analog performance; Channel widths; Fully depleted SOI; Self-cascode; SOI n-MOSFETs; Three-dimensional numerical simulations