Channel width influence on the analog performance of the asymmetric self-cascode FD SOI nMOSFETs
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2017-09-01
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ASSALTI, R.
Michelly De Souza
FLANDRE, D.
Michelly De Souza
FLANDRE, D.
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SBMicro 2017 - 32nd Symposium on Microelectronics Technology and Devices: Chip on the Sands, co-located Symposia: 30th SBCCI - Circuits and Systems Design, 2nd INSCIT - Electronic Instrumentation, 7th WCAS - IC Design Cases and 17th SForum - Undergraduate-Student Forum
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ASSALTI, R.; DE SOUZA, M.; FLANDRE, D. Channel width influence on the analog performance of the asymmetric self-cascode FD SOI nMOSFETs. SBMicro 2017 - 32nd Symposium on Microelectronics Technology and Devices: Chip on the Sands, co-located Symposia: 30th SBCCI - Circuits and Systems Design, 2nd INSCIT - Electronic Instrumentation, 7th WCAS - IC Design Cases and 17th SForum - Undergraduate-Student Forum, Sept. 2017.
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© 2017 IEEE.In this paper, the analog performance of the Asymmetric Self-Cascode structure of Fully Depleted SOI nMOSFETs has been evaluated with regards to the variation of channel width, through three-dimensional numerical simulations. The largest gain has been obtained using the narrowest transistor near the source and the widest transistor near the drain.