Cryogenic operation of Ω-gate p-type SiGe-on-insulator nanowire MOSFETs
dc.contributor.author | PAZ, B. C. | |
dc.contributor.author | Marcelo Antonio Pavanello | |
dc.contributor.author | CASSE, M. | |
dc.contributor.author | BARRAUD, S. | |
dc.contributor.author | REIMBOLD, G. | |
dc.contributor.author | VINET, M. | |
dc.contributor.author | FAYNOT, O. | |
dc.contributor.authorOrcid | https://orcid.org/0000-0003-1361-3650 | |
dc.date.accessioned | 2022-01-12T21:57:23Z | |
dc.date.available | 2022-01-12T21:57:23Z | |
dc.date.issued | 2018-03-19 | |
dc.description.abstract | This work evaluates the operation of p-type Si0.7Ge0.3-on-insulator (SGOI) nanowires from room temperature down to 5.2K. Electrical characteristics are shown for long channel devices comparing narrow Ω-gate to quasi-planar MOSFETs (wide fin width). Results show oscillations in both transconductance and gate to channel capacitance curves for temperatures smaller than 50K and fin width of 20nm due to quantum confinement effects. Improvement on the effective mobility for SGOI in comparison to SOI nanowires is still observed for devices with fin width scaled down to 20nm. Similar phonon-limited mobility contribution dependence on temperature is obtained for both narrow SGOI and SOI nanowires. | |
dc.description.firstpage | 1 | |
dc.description.lastpage | 4 | |
dc.description.volume | 2018-January | |
dc.identifier.citation | PAZ, B. C.; PAVANELLO, M. A.; CASSE, M.; BARRAUD, S.; REIMBOLD, G.; VINET, M.; VINET, M.; FAYNOT, O. Cryogenic operation of Ω-gate p-type SiGe-on-insulator nanowire MOSFETs. 2018 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon, EUROSOI-ULIS 2018, p.1-4, 2018. | |
dc.identifier.doi | 10.1109/ULIS.2018.8354736 | |
dc.identifier.uri | https://repositorio.fei.edu.br/handle/FEI/3789 | |
dc.relation.ispartof | 2018 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon, EUROSOI-ULIS 2018 | |
dc.rights | Acesso Restrito | |
dc.subject.otherlanguage | Low temperature | |
dc.subject.otherlanguage | Nanowire | |
dc.subject.otherlanguage | pMOSFET | |
dc.subject.otherlanguage | Quantum confinement | |
dc.subject.otherlanguage | SGOI | |
dc.subject.otherlanguage | SiGe | |
dc.subject.otherlanguage | SOI | |
dc.subject.otherlanguage | Transport | |
dc.title | Cryogenic operation of Ω-gate p-type SiGe-on-insulator nanowire MOSFETs | |
dc.type | Artigo de evento | |
fei.scopus.citations | 12 | |
fei.scopus.eid | 2-s2.0-85050940671 | |
fei.scopus.subject | Low temperatures | |
fei.scopus.subject | pMOSFET | |
fei.scopus.subject | SGOI | |
fei.scopus.subject | SiGe | |
fei.scopus.subject | Transport | |
fei.scopus.updated | 2025-02-01 | |
fei.scopus.url | https://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=85050940671&origin=inward |