Experimental and simulation analysis of electrical characteristics of common-source current mirrors implemented with asymmetric self-cascode silicon-on-insulator n-channel metal-oxide-semiconductor field-effect transistors

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dc.contributor.authorAssalti R.
dc.contributor.authord'Oliveira L.M.
dc.contributor.authorPavanello M.A.
dc.contributor.authorFlandre D.
dc.contributor.authorde Souza M.
dc.date.accessioned2019-08-19T23:45:11Z
dc.date.available2019-08-19T23:45:11Z
dc.date.issued2016
dc.description.abstract© The Institution of Engineering and Technology 2016.In this paper, the performance of asymmetric self-cascode (A-SC) fully depleted silicon-on-insulator n-channel metal-oxide-semiconductor field-effect transistors configuration applied to common-source current mirrors (CMs) have been analysed through experimental measurements, comparing with symmetric self-cascode configuration as well as with standard uniformly doped transistor. The mirroring precision, output resistance and output swing have been used as figures of merit to evaluate the improvements achieved with the use of A-SC transistors. Two-dimensional numerical simulations have been also performed in order to further explore the advantages of A-SC transistor in common-source CMs. The obtained results have shown that the best mirroring precision has been obtained with larger channel lengths of the transistor near the source. Despite the worsened intrinsic mismatching presented by commonsource CMs implemented with A-SC transistors in comparison with single transistor CM, the A-SC structure has allowed larger output resistance, breakdown voltage and better mirroring precision.
dc.description.firstpage349
dc.description.issuenumber4
dc.description.lastpage355
dc.description.volume10
dc.identifier.citationASSALTI, R.; D'OLIVEIRA, L. M.; PAVANELLO, M. A.; FLANDRE, Denis; DE SOUZA, Michelly. Experimental and simulation analysis of electrical characteristics of common-source current mirrors implemented with asymmetric self-cascode silicon-on-insulator n-channel metal-oxide-semiconductor field-effect transistors. IET Circuits, Devices & Systems (Print), v. 1, p. 1, 2016.
dc.identifier.doi10.1049/iet-cds.2015.0159
dc.identifier.issn1751-858X
dc.identifier.urihttps://repositorio.fei.edu.br/handle/FEI/1111
dc.relation.ispartofIET Circuits, Devices and Systems
dc.rightsAcesso Restrito
dc.titleExperimental and simulation analysis of electrical characteristics of common-source current mirrors implemented with asymmetric self-cascode silicon-on-insulator n-channel metal-oxide-semiconductor field-effect transistors
dc.typeArtigo
fei.scopus.citations2
fei.scopus.eid2-s2.0-84978872809
fei.scopus.subjectChannel length
fei.scopus.subjectElectrical characteristic
fei.scopus.subjectFigures of merits
fei.scopus.subjectFully depleted silicon-on-insulator
fei.scopus.subjectOutput resistance
fei.scopus.subjectSimulation analysis
fei.scopus.subjectSingle transistors
fei.scopus.subjectTwo-dimensional numerical simulation
fei.scopus.updated2024-05-01
fei.scopus.urlhttps://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=84978872809&origin=inward
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