Modeling the interface traps-related low frequency noise in triple-gate SOI junctionless nanowire transistors

Página do item simplificado
dc.contributor.authorTrevisoli R.
dc.contributor.authorDoria R.T.
dc.contributor.authorBarraud S.
dc.contributor.authorPavanello M.A.
dc.date.accessioned2019-08-19T23:45:13Z
dc.date.available2019-08-19T23:45:13Z
dc.date.issued2019
dc.description.abstract© 2019 Elsevier B.V.The aim of this work is to propose a semi-analytical model for the low frequency noise caused by interface traps in Triple-Gate Junctionless Nanowire Transistors. The proposed model is based on a drain current model, which includes short channel effects influence. The surface potential and the occupied trap density equations are solved self consistently to obtain the traps influence in the static drain current, which is used to determine the trap-related noise. In this work, the low frequency noise of traps in discrete levels is analyzed. The model has been validated with 3D simulations considering different devices characteristics, biases and trap levels. Experimental results have also been used to demonstrate the model suitability.
dc.description.firstpage111005
dc.description.volume215
dc.identifier.citationTREVISOLI, RENAN; Doria, Rodrigo Trevisoli; BARRAUD, SYLVAIN; Pavanello, Marcelo Antonio. Modeling the interface traps-related low frequency noise in triple-gate SOI junctionless nanowire transistors. MICROELECTRONIC ENGINEERING, v. 215, p. 111005, 2019.
dc.identifier.doi10.1016/j.mee.2019.111005
dc.identifier.issn0167-9317
dc.identifier.urihttps://repositorio.fei.edu.br/handle/FEI/1141
dc.relation.ispartofMicroelectronic Engineering
dc.rightsAcesso Restrito
dc.subject.otherlanguageInterface trap density
dc.subject.otherlanguageJunctionless nanowire transistors
dc.subject.otherlanguageLow-frequency noise
dc.subject.otherlanguageSemi-analytical model
dc.titleModeling the interface traps-related low frequency noise in triple-gate SOI junctionless nanowire transistors
dc.typeArtigo
fei.scopus.citations3
fei.scopus.eid2-s2.0-85066098852
fei.scopus.subjectDiscrete levels
fei.scopus.subjectDrain current models
fei.scopus.subjectInterface trap density
fei.scopus.subjectLow-Frequency Noise
fei.scopus.subjectModel suitability
fei.scopus.subjectNanowire transistors
fei.scopus.subjectSemi-analytical model
fei.scopus.subjectShort-channel effect
fei.scopus.updated2024-03-04
fei.scopus.urlhttps://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=85066098852&origin=inward
Arquivos
Coleções
Artigos