Influence of non-vertical sidewall on finfet threshold voltage

dc.contributor.authorRenato Giacomini
dc.contributor.authorJoao Antonio Martino
dc.date.accessioned2023-08-26T23:50:24Z
dc.date.available2023-08-26T23:50:24Z
dc.date.issued2006-08-28
dc.description.abstractThe FinFET structure is one of the most promising architecture approaches to double-gate devices. Due to limitations of process uniformity, most fabricated FinFETs have width variation along the vertical direction, resulting in non-vertical sidewalls. The impact of non-vertical sidewalls on the threshold voltage of FinFETs is studied in this work through three-dimensional simulation. The main purpose of this study is to verify the applicability of some analytical models developed to double-gate devices with parallel gates to FinFETs with inclined sidewalls. The behavior of the threshold voltage for different doping levels and silicon film width is discussed. The use of the existing models taking an average width of the silicon film as the device width is proposed and shows to be a good approximation. © 2006 The Electrochemical Society.
dc.description.firstpage275
dc.description.issuenumber1
dc.description.lastpage281
dc.description.volume4
dc.identifier.citationGIACOMINI, R.; MARTINO, J. A. Influence of non-vertical sidewall on finfet threshold voltage. ECS Transactions, v. 4, n. 1, p. 275-281, aug. 2006.
dc.identifier.issn1938-6737
dc.identifier.urihttps://repositorio.fei.edu.br/handle/FEI/5033
dc.relation.ispartofECS Transactions
dc.rightsAcesso Restrito
dc.titleInfluence of non-vertical sidewall on finfet threshold voltage
dc.typeArtigo de evento
fei.scopus.citations1
fei.scopus.eid2-s2.0-33847666360
fei.scopus.subjectAnalytical models
fei.scopus.subjectDoping levels
fei.scopus.subjectDouble gate devices
fei.scopus.subjectSilicon films
fei.scopus.updated2024-05-01
fei.scopus.urlhttps://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=33847666360&origin=inward
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