Boosting the performance of MOSFET operating under a huge range of high temperature by using the octagonal layout style
dc.contributor.author | GALEMBECK, E. H. S. | |
dc.contributor.author | SWART, J. | |
dc.contributor.author | SILVA, G. A. | |
dc.contributor.author | Salvador Gimenez | |
dc.contributor.authorOrcid | https://orcid.org/0000-0002-3616-9559 | |
dc.date.accessioned | 2022-01-12T21:56:20Z | |
dc.date.available | 2022-01-12T21:56:20Z | |
dc.date.issued | 2019-08-30 | |
dc.description.abstract | © 2019 IEEE.This paper performs an experimental comparative study of a huge variation of temperature influence (from 300K to 573K) in planar Metal-Oxide-Semiconductor (MOS) Field-Effect-Transistors (MOSFETs), which are implemented with the octagonal (Octo MOSFETs, OM) and rectangular (Rectangular MOSFETs, RM) layout styles, regarding the same bias conditions. The devices were manufactured regarding a Complementary MOS (CMOS) Integrated Circuits (ICs) manufacturing process of 180 nm. The main results have shown that the OM is capable of keeping active the Longitudinal Corner Effect (LCE) and PArallel Connection of MOSFETs with Different Channel Lengths Effect (PAMDLE), which are intrinsic present in its structure, resulting a higher electrical performing in the relation to their RM counterparts, such as the OM saturation drain current (IDS_SAT) and transconductance (gm) are approximately three and two times, respectively, better as compared to those found in its RM counterpart. Therefore, the octagonal layout style for MOSFETs can be considered an alternative layout strategy to boost the electrical performance of the MOSFETs, without causing any additional burden to the CMOS ICs manufacturing process. | |
dc.identifier.citation | GALEMBECK, E. H. S.; SWART, J.; SILVA, G. A.; GIMENEZ, S. Boosting the performance of MOSFET operating under a huge range of high temperature by using the octagonal layout style. SBMicro 2019 - 34th Symposium on Microelectronics Technology and Devices, Aug. 2019. | |
dc.identifier.doi | 10.1109/SBMicro.2019.8919320 | |
dc.identifier.uri | https://repositorio.fei.edu.br/handle/FEI/3718 | |
dc.relation.ispartof | SBMicro 2019 - 34th Symposium on Microelectronics Technology and Devices | |
dc.rights | Acesso Restrito | |
dc.subject.otherlanguage | high temperature | |
dc.subject.otherlanguage | new layouts for MOSFET | |
dc.subject.otherlanguage | Octagonal layout style | |
dc.subject.otherlanguage | Octo MOSFET | |
dc.title | Boosting the performance of MOSFET operating under a huge range of high temperature by using the octagonal layout style | |
dc.type | Artigo de evento | |
fei.scopus.citations | 0 | |
fei.scopus.eid | 2-s2.0-85077216821 | |
fei.scopus.subject | Electrical performance | |
fei.scopus.subject | High temperature | |
fei.scopus.subject | Integrated circuits (ICs) | |
fei.scopus.subject | Manufacturing process | |
fei.scopus.subject | MOS-FET | |
fei.scopus.subject | Octagonal layout style | |
fei.scopus.subject | Saturation drain current | |
fei.scopus.subject | Temperature influence | |
fei.scopus.updated | 2025-02-01 | |
fei.scopus.url | https://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=85077216821&origin=inward |