Evaluation of triple-gate finfets with high-κ dielectrics and TiN gate material under analog operation

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dc.contributor.authorMarcelo Antonio Pavanello
dc.contributor.authorJoao Antonio Martino
dc.contributor.authorSIMOEN, E.
dc.contributor.authorROOYACKERS, R.
dc.contributor.authorCOLLAERT, N.
dc.contributor.authorCLAEYS, C.
dc.contributor.authorOrcidhttps://orcid.org/0000-0003-1361-3650
dc.contributor.authorOrcidhttps://orcid.org/0000-0001-8121-6513
dc.date.accessioned2023-08-26T23:50:30Z
dc.date.available2023-08-26T23:50:30Z
dc.date.issued2007-09-01
dc.description.abstractThis work presents the analog performance of nMOS and pMOS triple-gate FinFETs with high-κ dielectrics, TiN gate material and undoped body from DC measurements. Different fin widths and devices with and without halo implantation are explored. No halo FinFETs can achieve extremely large gain at similar channel length and improved unity gain frequency. The FinFETs with channel length of 110 nm achieved an intrinsic gain of 25 dB. Extremely large Early voltages have been measured on long channel nMOS and pMOS with relatively wide fins compared to the results usually reported in the literature. The large Early voltage obtained suggests the devices are in the onset of volume inversion phenomena due to the low doping level of the device body. © 2006 The Electrochemical Society.
dc.description.firstpage237
dc.description.issuenumber1
dc.description.lastpage245
dc.description.volume4
dc.identifier.citationPAVANELLO, M. A.; MARTINO, J. A.; SIMOEN, E.; ROOYACKERS, R.; COLLAERT, N.; CLAEYS, C. Evaluation of triple-gate finfets with high-κ dielectrics and TiN gate material under analog operation. ECS Transactions, v. 4, n. 1, p. 237-245, sept. 2007.
dc.identifier.issn1938-6737
dc.identifier.urihttps://repositorio.fei.edu.br/handle/FEI/5039
dc.relation.ispartofECS Transactions
dc.rightsAcesso Restrito
dc.titleEvaluation of triple-gate finfets with high-κ dielectrics and TiN gate material under analog operation
dc.typeArtigo de evento
fei.scopus.citations0
fei.scopus.eid2-s2.0-33847611908
fei.scopus.subjectChannel length
fei.scopus.subjectFinFETs
fei.scopus.subjectGate materials
fei.scopus.subjectHalo implantation
fei.scopus.updated2024-07-01
fei.scopus.urlhttps://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=33847611908&origin=inward
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