Cryogenic operation of FinFETs aiming at analog applications

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dc.contributor.authorPavanello M.A.
dc.contributor.authorMartino J.A.
dc.contributor.authorSimoen E.
dc.contributor.authorClaeys C.
dc.date.accessioned2019-08-19T23:45:09Z
dc.date.available2019-08-19T23:45:09Z
dc.date.issued2009
dc.description.abstractFinFETs are recognized as promising candidates for the CMOS nanometer era. In this paper the most recent results for cryogenic operation of FinFETs will be demonstrated with special emphasis on analog applications. Threshold voltage, subthreshold slope and carrier mobility will be studied. Also some important figures of merit for analog circuit operation as for readout electronics, such as transconductance, output conductance and intrinsic voltage gain will be covered. It is demonstrated that the threshold voltage of undoped narrow FinFETs is less temperature-dependent than for a planar single-gate device with similar doping concentration. The temperature reduction improves the transconductance over drain current ratio in any operational region. On the other hand, the output conductance is degraded when the temperature is reduced. The combination of these effects shows that the intrinsic gain of a L = 90 nm FinFET is degraded by 2 dB when the temperature reduces from 300 K to 100 K. © 2009 Elsevier Ltd. All rights reserved.
dc.description.firstpage590
dc.description.issuenumber11
dc.description.lastpage594
dc.description.volume49
dc.identifier.citationPAVANELLO, Marcelo A.; MARTINO, João Antonio; SIMOEN, Eddy; CLAEYS, Cor. Cryogenic Operation of FinFETs Aiming at Analog Applications. Cryogenics (Guildford), v. 49, n. 11, p. 590-594, 2009.
dc.identifier.doi10.1016/j.cryogenics.2008.12.012
dc.identifier.issn0011-2275
dc.identifier.urihttps://repositorio.fei.edu.br/handle/FEI/1075
dc.relation.ispartofCryogenics
dc.rightsAcesso Restrito
dc.subject.otherlanguageA. Semiconductors
dc.subject.otherlanguageD. Cryoelectronics
dc.titleCryogenic operation of FinFETs aiming at analog applications
dc.typeArtigo
fei.scopus.citations26
fei.scopus.eid2-s2.0-70350616420
fei.scopus.subjectA. Semiconductors
fei.scopus.subjectAnalog applications
fei.scopus.subjectCryogenic operations
fei.scopus.subjectD. Cryoelectronics
fei.scopus.subjectDoping concentration
fei.scopus.subjectFigures of merits
fei.scopus.subjectFinFETs
fei.scopus.subjectNanometer era
fei.scopus.subjectOperational regions
fei.scopus.subjectOutput conductance
fei.scopus.subjectReadout Electronics
fei.scopus.subjectSingle-gate devices
fei.scopus.subjectSubthreshold slope
fei.scopus.subjectTemperature dependent
fei.scopus.subjectTemperature reduction
fei.scopus.subjectVoltage gain
fei.scopus.updated2024-11-01
fei.scopus.urlhttps://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=70350616420&origin=inward
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