On-resistance and harmonic distortion in graded-channel SOI FD MOSFET
dc.contributor.advisorOrcid | https://orcid.org/0000-0003-1361-3650 | |
dc.contributor.author | CERDEIRA, A. | |
dc.contributor.author | ALEMAN, M. A. | |
dc.contributor.author | Marcelo Antonio Pavanello | |
dc.contributor.author | MARTINO, J. A. | |
dc.contributor.author | VANCAILLIE, L. | |
dc.contributor.author | FLANDRE, D. | |
dc.date.accessioned | 2023-08-26T23:50:49Z | |
dc.date.available | 2023-08-26T23:50:49Z | |
dc.date.issued | 2004-11-05 | |
dc.description.abstract | In this paper we analyze the advantages of asymmetric channel engineering on the MOS resistance behavior in quasi-linear operation, such as used in integrated continuous-time tunable filters. The study of the two major figures of merit in such applications, i.e. on-resistance and non-linear harmonic distortion, is supported by measurements on conventional and Graded-Channel (GC) fully depleted (FD) SOI MOSFETs. The quasi linear I-V characteristics of GC transistors demonstrate a decrease of the on-resistance as the length of the low doped region into the channel is augmented and an improvement of the third order harmonic distortion (HD3), when compared with conventional transistors. A full comparison method between conventional and GC SOI MOSFETs is presented considering HD3 evolution with on-resistance tuning under low voltage of operation, demonstrating the significant advantages of the asymmetrical long channel transistors. © 2004 IEEE. | |
dc.description.firstpage | 118 | |
dc.description.lastpage | 121 | |
dc.identifier.citation | CERDEIRA, A.; ALEMAN, M. A.; PAVANELLO, M. A.; MARTINO, J. A.; VANCAILLIE, L.; FLANDRE, D. On-resistance and harmonic distortion in graded-channel SOI FD MOSFET. Proceedings of the IEEE International Caracas Conference on Devices, Circuits and Systems, ICCDCS, p. 118-121, nov. 2004. | |
dc.identifier.issn | 1541-6275 | |
dc.identifier.uri | https://repositorio.fei.edu.br/handle/FEI/5059 | |
dc.relation.ispartof | Proceedings of the IEEE International Caracas Conference on Devices, Circuits and Systems, ICCDCS | |
dc.rights | Acesso Restrito | |
dc.title | On-resistance and harmonic distortion in graded-channel SOI FD MOSFET | |
dc.type | Artigo de evento | |
fei.scopus.citations | 1 | |
fei.scopus.eid | 2-s2.0-28444432964 | |
fei.scopus.subject | Conventional transistors | |
fei.scopus.subject | On-resistance tuning | |
fei.scopus.subject | Quasi-linear operation | |
fei.scopus.subject | Tunable filters | |
fei.scopus.updated | 2025-02-01 | |
fei.scopus.url | https://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=28444432964&origin=inward |