Using diamond layout style to boost MOSFET frequency response of analogue IC

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dc.contributor.authorGimenez S.P.
dc.contributor.authorLeoni R.D.
dc.contributor.authorRenaux C.
dc.contributor.authorFlandre D.
dc.date.accessioned2019-08-19T23:45:28Z
dc.date.available2019-08-19T23:45:28Z
dc.date.issued2014
dc.description.abstractA way to improve the metal-oxide-semiconductor field effect transistor (MOSFET) analogue electrical performance, still little explored, is to modify their aspect form or ratio (AR) by the use of innovative layout styles. The diamond MOSFET (DM) is an example of this approach. It presents hexagonal gate geometry. This new layout structure for MOSFET induces two additional effects in comparison with the conventional (i.e. rectangular gate geometry) MOSFET (CM) counterpart, which improves the device's electrical performance: the longitudinal corner effect (LCE) and parallel association of MOSFET with different channel length effect (PAMDLE). How the diamond layout style (DLS) can significantly enhance the device's frequency response (FR) by using two different integrated circuits' (IC) complementary metal-oxide-semiconductor (CMOS) manufacturing process technologies (bulk and silicon-on-insulator (SOI)) is demonstrated. © 2014 The Institution of Engineering and Technology.
dc.description.firstpage398
dc.description.issuenumber5
dc.description.lastpage400
dc.description.volume50
dc.identifier.citationGIMENEZ, S.P.; RENAUX, C.; LEONI, R.D.; FLANDRE, D.. Using diamond layout style to boost MOSFET frequency response of analogue IC. Electronics Letters, v. 50, n. 5, p. 398-400, 2014.
dc.identifier.doi10.1049/el.2013.4038
dc.identifier.issn0013-5194
dc.identifier.urihttps://repositorio.fei.edu.br/handle/FEI/1304
dc.relation.ispartofElectronics Letters
dc.rightsAcesso Restrito
dc.titleUsing diamond layout style to boost MOSFET frequency response of analogue IC
dc.typeArtigo
fei.scopus.citations22
fei.scopus.eid2-s2.0-84896987177
fei.scopus.subjectChannel length
fei.scopus.subjectComplementary metal oxide semiconductors
fei.scopus.subjectElectrical performance
fei.scopus.subjectLayout structure
fei.scopus.subjectManufacturing process
fei.scopus.subjectMetal oxide semiconductor field-effect transistors
fei.scopus.subjectParallel association
fei.scopus.subjectSilicon-on-insulators
fei.scopus.updated2024-03-04
fei.scopus.urlhttps://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=84896987177&origin=inward
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