Advantages of the graded-channel SOI FD MOSFET for application as a quasi-linear resistor
dc.contributor.author | Cerdeira A. | |
dc.contributor.author | Aleman M.A. | |
dc.contributor.author | Pavanello M.A. | |
dc.contributor.author | Martino J.A. | |
dc.contributor.author | Vancaillie L. | |
dc.contributor.author | Flandre D. | |
dc.date.accessioned | 2019-08-19T23:45:08Z | |
dc.date.available | 2019-08-19T23:45:08Z | |
dc.date.issued | 2005 | |
dc.description.abstract | In this paper, we analyze the previously unexpected advantages of asymmetric channel engineering on the MOS resistance behavior in quasi-linear operation, such as used in integrated continuous-time tunable filters. The study of the two major figures of merit in such applications as on-resistance and nonlinear harmonic distortion, is supported by both measurements and simulations of conventional and graded-channel (GC) fully depleted silicon-on-insultor (SOI) MOSFETs. The quasi-linear current-voltage characteristics of GC transistors show a decrease of the on-resistance as the length of the low doped region in the channel is increased, as well as an improvement in the third-order harmonic distortion (HD3), when compared with conventional transistors. A method for full comparison between conventional and GC SOI MOSFETs is presented, considering HD3 evolution with on-resistance tuning under low voltage of operation. Results demonstrate the significant advantages provided by the asymmetrical long channel transistors. © 2005 IEEE. | |
dc.description.firstpage | 967 | |
dc.description.issuenumber | 5 | |
dc.description.lastpage | 972 | |
dc.description.volume | 52 | |
dc.identifier.citation | CERDEIRA, Antonio; ALEMÁN, Miguel; PAVANELLO, Marcelo A.; MARTINO, João Antonio; VANCAILLIE, Laurent; FLANDRE, Denis. Advantages of the Graded-Channel SOI FD MOSFET for Application as a Quasi-Linear Resistor. I.E.E.E. Transactions on Electron Devices, v. 52, n. 5, p. 967-972, 2005. | |
dc.identifier.doi | 10.1109/TED.2005.846327 | |
dc.identifier.issn | 0018-9383 | |
dc.identifier.uri | https://repositorio.fei.edu.br/handle/FEI/1059 | |
dc.relation.ispartof | IEEE Transactions on Electron Devices | |
dc.rights | Acesso Restrito | |
dc.subject.otherlanguage | Graded-channel MOSFET | |
dc.subject.otherlanguage | Harmonic distortion | |
dc.subject.otherlanguage | Integral function method (IFM) | |
dc.subject.otherlanguage | MOSFET-C filters | |
dc.subject.otherlanguage | Quasi-linear resistor | |
dc.title | Advantages of the graded-channel SOI FD MOSFET for application as a quasi-linear resistor | |
dc.type | Artigo | |
fei.scopus.citations | 48 | |
fei.scopus.eid | 2-s2.0-18844377426 | |
fei.scopus.subject | Graded channel MOSFET | |
fei.scopus.subject | Integral function method (IFM) | |
fei.scopus.subject | MOSFET-C filters | |
fei.scopus.subject | On-resistance tuning | |
fei.scopus.subject | Quasi linear resistor | |
fei.scopus.updated | 2023-12-01 | |
fei.scopus.url | https://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=18844377426&origin=inward |