New Hybrid Generation of Layout Styles to Boost the Electrical, Energy, and Frequency Response Performances of Analog MOSFETs

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dc.contributor.authorGALEMBECK, E. H. S.
dc.contributor.authorSalvador Gimenez
dc.contributor.authorOrcidhttps://orcid.org/0000-0002-3616-9559
dc.date.accessioned2022-06-01T06:05:08Z
dc.date.available2022-06-01T06:05:08Z
dc.date.issued2022-01-05
dc.description.abstractIEEEIt is known that the hexagonal (Diamond) layout style is capable of boosting the electrical performance and ionizing radiation tolerances of metal-oxide-semiconductor field-effect-transistors (MOSFETs). In order to further improve the figures of merit of these devices, it was proposed a hybrid gate geometry that is an evolution of the hexagonal layout style, entitled Half-Diamond. This innovative layout style is able to generate the same electrical effects that the Diamond is able to generate, and it is innovative because it is capable of further reducing the effective channel lengths of MOSFETs implemented with Diamond and rectangular layout styles. Thus, this work describes a comparative study by 3-D numerical simulations data and experimental data between the MOSFETs implemented with the Half-Diamond and Conventional layout styles. The main results found have indicated that the saturation drain current and transconductance of MOSFET layouted with Half-Diamond are 36% and 27% higher, respectively, than those measured in the Conventional MOSFET. Other results have shown that the innovative half-diamond layout style (HDLS) for MOSFETs is capable of reducing the dissipated electrical power in approximately 62% and, therefore, it is an alternative hardness-by-design strategy to remarkably improve complementary metal-oxide-semiconductor (CMOS) integrated circuits (ICs) energy efficiency. Besides, the electrical behaviors of longitudinal corner effect (LCE), parallel connection of MOSFETs with different channel lengths effect (PAMDLE), and deactivation of parasitic MOSFETs in the bird's beak regions effect (DEPAMBBRE) of the MOSFETs implemented with the HDLS are studied in detail to justify the results found.
dc.identifier.citationGALEMBECK, E. H. S.; GIMENEZ, S. New Hybrid Generation of Layout Styles to Boost the Electrical, Energy, and Frequency Response Performances of Analog MOSFETs. IEEE Transactions on Electron Devices. Jan. 2022.
dc.identifier.doi10.1109/TED.2022.3167944
dc.identifier.issn1557-9646
dc.identifier.urihttps://repositorio.fei.edu.br/handle/FEI/4505
dc.relation.ispartofIEEE Transactions on Electron Devices
dc.rightsAcesso Restrito
dc.subject.otherlanguage3-D numerical simulations
dc.subject.otherlanguageDiamond
dc.subject.otherlanguageGeometry
dc.subject.otherlanguagehalf-diamond MOSFET (HDM)
dc.subject.otherlanguageLayout
dc.subject.otherlanguageLogic gates
dc.subject.otherlanguagelongitudinal corner effect (LCE)
dc.subject.otherlanguageMOSFET
dc.subject.otherlanguagenonstandard gate geometries
dc.subject.otherlanguageparallel connection of MOSFETs with different channel lengths effect (PAMDLE).
dc.subject.otherlanguageShape
dc.subject.otherlanguageStandards
dc.titleNew Hybrid Generation of Layout Styles to Boost the Electrical, Energy, and Frequency Response Performances of Analog MOSFETs
dc.typeArtigo
fei.scopus.citations2
fei.scopus.eid2-s2.0-85129599732
fei.scopus.subject3-D numerical simulation
fei.scopus.subjectChannel length
fei.scopus.subjectCorner effects
fei.scopus.subjectGate geometry
fei.scopus.subjectHalf-diamond metal-oxide-semiconductor field-effect-transistor
fei.scopus.subjectLayout
fei.scopus.subjectLength effects
fei.scopus.subjectLongitudinal corner effect
fei.scopus.subjectNonstandard gate geometry
fei.scopus.subjectParallel connection of metal-oxide-semiconductor field-effect-transistor with different channel length effect .
fei.scopus.subjectParallel connections
fei.scopus.subjectShape
fei.scopus.updated2024-07-01
fei.scopus.urlhttps://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=85129599732&origin=inward
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