Influence of fin width and channel length on the performance of buffers implemented with standard and strained triple-gate nFinFETs

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dc.contributor.authorMarcelo Antonio Pavanello
dc.contributor.authorMARTINO, J. A.
dc.contributor.authorSIMOEN, E.
dc.contributor.authorROOYACKERS, R.
dc.contributor.authorCOLLAERT, N.
dc.contributor.authorCLAEYS, C.
dc.contributor.authorOrcidhttps://orcid.org/0000-0003-1361-3650
dc.date.accessioned2022-01-12T22:04:29Z
dc.date.available2022-01-12T22:04:29Z
dc.date.issued2009-09-03
dc.description.abstractIn this work the application of standard and strained triple-gate FinFETs in unity-gain source-follower configuration is compared. The analysis is performed by evaluating the buffer voltage gain with respect to the fin width and channel length as well as the total harmonic distortion. It is demonstrated that the application of strained material in narrow FinFETs, when the devices are operating in double-gate mode, can be beneficial for the performance of buffers in any channel length. On the other hand, for triple-gate FinFETs or quasi-planar ones the degradation of the output conductance overcomes the transconductance improvements from strained material and the performance of standard buffers is better than of strained ones. Narrow strained buffers also offer better harmonic distortion. © The Electrochemical Society.
dc.description.firstpage567
dc.description.issuenumber1
dc.description.lastpage574
dc.description.volume23
dc.identifier.citationPAVANELLO, M. A.; MARTINO, J. A.; SIMOEN, E.; ROOYACKERS, R.; COLLAERT, N.; CLAEYS, C. Influence of fin width and channel length on the performance of buffers implemented with standard and strained triple-gate nFinFETs. ECS Transactions, v. 23, n. 1, p.567-574, Sept. 2009.
dc.identifier.doi10.1149/1.3183765
dc.identifier.issn1938-5862
dc.identifier.urihttps://repositorio.fei.edu.br/handle/FEI/4274
dc.relation.ispartofECS Transactions
dc.rightsAcesso Restrito
dc.titleInfluence of fin width and channel length on the performance of buffers implemented with standard and strained triple-gate nFinFETs
dc.typeArtigo de evento
fei.scopus.citations0
fei.scopus.eid2-s2.0-74549178571
fei.scopus.subjectChannel length
fei.scopus.subjectDouble-gate
fei.scopus.subjectFin widths
fei.scopus.subjectFinFETs
fei.scopus.subjectOutput conductance
fei.scopus.subjectTotal harmonic distortions
fei.scopus.subjectTriple-gate
fei.scopus.subjectVoltage gain
fei.scopus.updated2024-08-01
fei.scopus.urlhttps://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=74549178571&origin=inward
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