Analysis of the substrate bias effect on the interface trapped charges in junctionless nanowire transistors through low-frequency noise characterization

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dc.contributor.authorDoria R.T.
dc.contributor.authorTrevisoli R.
dc.contributor.authorde Souza M.
dc.contributor.authorBarraud S.
dc.contributor.authorVinet M.
dc.contributor.authorFaynot O.
dc.contributor.authorPavanello M.A.
dc.date.accessioned2019-08-19T23:45:12Z
dc.date.available2019-08-19T23:45:12Z
dc.date.issued2017
dc.description.abstract© 2017 Elsevier B.V.This work presents, for the first time, an experimental analysis of the low-frequency noise and the effective trap density dependence of junctionless nanowire transistors (JNTs) on the substrate bias. The study has been performed for devices with different channel lengths and doping concentrations biased close to the threshold and deep in linear regime. It has been shown that the surface potential of JNTs is strongly influenced by the substrate bias even above threshold. Thus, the drain current noise spectral density and the effective trap density can be improved or degraded depending on the bias applied to the substrate of the devices. Additionally, it is shown that, the variation on the substrate bias enables the evaluation of traps with different activation energy ranges, which is more evident in heavier doped devices due to the higher threshold voltage sensitivity to the substrate bias.
dc.description.firstpage17
dc.description.lastpage20
dc.description.volume178
dc.identifier.citationDORIA, Rodrigo Trevisoli; TREVISOLI, Renan D.; DE SOUZA, Michelly; VINET, MAUD; BARRAUD, SYLVAIN; PAVANELLO, Marcelo A.. Analysis of the substrate bias effect on the interface trapped charges in junctionless nanowire transistors through low-frequency noise characterization. MICROELECTRONIC ENGINEERING, v. 178, p. 17-20, 2017.
dc.identifier.doi10.1016/j.mee.2017.04.014
dc.identifier.issn0167-9317
dc.identifier.urihttps://repositorio.fei.edu.br/handle/FEI/1127
dc.relation.ispartofMicroelectronic Engineering
dc.rightsAcesso Restrito
dc.subject.otherlanguageEffective trap density
dc.subject.otherlanguageJunctionless nanowire transistors
dc.subject.otherlanguageLow-frequency noise
dc.subject.otherlanguageSubstrate bias
dc.titleAnalysis of the substrate bias effect on the interface trapped charges in junctionless nanowire transistors through low-frequency noise characterization
dc.typeArtigo
fei.scopus.citations10
fei.scopus.eid2-s2.0-85018628460
fei.scopus.subjectDoping concentration
fei.scopus.subjectExperimental analysis
fei.scopus.subjectInterface trapped charges
fei.scopus.subjectLow-Frequency Noise
fei.scopus.subjectNanowire transistors
fei.scopus.subjectSubstrate bias
fei.scopus.subjectSubstrate bias effects
fei.scopus.subjectTrap density
fei.scopus.updated2024-03-04
fei.scopus.urlhttps://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=85018628460&origin=inward
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