Cryogenic operation of junctionless nanowire transistors

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dc.contributor.authorDe Souza M.
dc.contributor.authorPavanello M.A.
dc.contributor.authorTrevisoli R.D.
dc.contributor.authorDoria R.T.
dc.contributor.authorColinge J.-P.
dc.date.accessioned2019-08-19T23:45:10Z
dc.date.available2019-08-19T23:45:10Z
dc.date.issued2011
dc.description.abstractThis letter presents the properties of nMOS junctionless nanowire transistors (JNTs) under cryogenic operation. Experimental results of drain current, subthreshold slope, maximum transconductance at low electric field, and threshold voltage, as well as its variation with temperature, are presented. Unlike in classical devices, the drain current of JNTs decreases when temperature is lowered, although the maximum transconductance increases when the temperature is lowered down to 125 K. An analytical model for the threshold voltage is proposed to explain the influence of nanowire width and doping concentration on its variation with temperature. It is shown that the wider the nanowire or the lower the doping concentration, the higher the threshold voltage variation with temperature. © 2011 IEEE.
dc.description.firstpage1322
dc.description.issuenumber10
dc.description.lastpage1324
dc.description.volume32
dc.identifier.citationDE SOUZA, Michelly; PAVANELLO, Marcelo A.; PAVANELLO, M. A.; TREVISOLI, Renan Doria; DORIA, Rodrigo Trevisoli; COLINGE, J. -P.. Cryogenic Operation of Junctionless Nanowire Transistor. IEEE Electron Device Letters (Print), v. 32, n. 10, p. 1322-1324, 2011.
dc.identifier.doi10.1109/LED.2011.2161748
dc.identifier.issn0741-3106
dc.identifier.urihttps://repositorio.fei.edu.br/handle/FEI/1087
dc.relation.ispartofIEEE Electron Device Letters
dc.rightsAcesso Restrito
dc.subject.otherlanguageJunctionless transistor
dc.subject.otherlanguagelow temperature
dc.subject.otherlanguagenanowire transistor
dc.subject.otherlanguagesilicon-on-insulator (SOI)
dc.subject.otherlanguagethreshold voltage model
dc.titleCryogenic operation of junctionless nanowire transistors
dc.typeArtigo
fei.scopus.citations53
fei.scopus.eid2-s2.0-80053573335
fei.scopus.subjectAnalytical model
fei.scopus.subjectCryogenic operations
fei.scopus.subjectDoping concentration
fei.scopus.subjectJunctionless transistor
fei.scopus.subjectLow temperatures
fei.scopus.subjectMaximum transconductance
fei.scopus.subjectnanowire transistor
fei.scopus.subjectNanowire transistors
fei.scopus.subjectSilicon-on-insulators
fei.scopus.subjectSubthreshold slope
fei.scopus.subjectThreshold voltage variation
fei.scopus.updated2024-03-04
fei.scopus.urlhttps://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=80053573335&origin=inward
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