Implementation of tunable resistors using graded-channel SOI MOSFETs operating in cryogenic environments
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2005-09-07
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Marcelo Antonio Pavanello
CERDEIRA, A.
MARTINO, J. A.
ALEMAN, M. A.
FLANDRE, D.
CERDEIRA, A.
MARTINO, J. A.
ALEMAN, M. A.
FLANDRE, D.
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Proceedings - Electrochemical Society
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PAVANELLO, M. A.; CERDEIRA, A.; MARTINO, J. A.; ALEMAN, M. A.; FLANDRE, D. Implementation of tunable resistors using graded-channel SOI MOSFETs operating in cryogenic environments. Proceedings - Electrochemical Society, PV 2005-08, p. 520-528, sept. 2005.
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The performance evaluation of conventional and graded-channel SOI MOSFETs operating as tunable resistors is performed from room temperature down to 90 K. The on-resistance, total harmonic distortion and third order harmonic distortion have been adopted as figures of merit. It is shown that the on-resistance reduces with the temperature lowering and is smaller in any GC SOI than in conventional SOI due to the effective channel length reduction. The total harmonic distortion is weakly temperature dependent and decreases in GC transistors, due to reduction of the effective voltage amplitude that is applied on the conventionally doped part of the channel. On the other hand, the third order harmonic distortion is strongly temperature influenced, increasing 15 dB at 90 K with respect to room temperature operation. Conventional and GC SOI have similar third order harmonic distortion in all studied temperatures.