Improving MOSFETs' TID Tolerance Through Diamond Layout Style
dc.contributor.author | Seixas L.E. | |
dc.contributor.author | Goncalez O.L. | |
dc.contributor.author | Souza R. | |
dc.contributor.author | Finco S. | |
dc.contributor.author | Vaz R.G. | |
dc.contributor.author | Da Silva G.A. | |
dc.contributor.author | Gimenez S.P. | |
dc.date.accessioned | 2019-08-19T23:45:29Z | |
dc.date.available | 2019-08-19T23:45:29Z | |
dc.date.issued | 2017 | |
dc.description.abstract | © 2001-2011 IEEE.This letter describes an experimental comparative study of the total ionizing dose (TID) effects due to Co-60 gamma irradiation between hexagonal (Diamond) and conventional rectangular gates metal-oxide semiconductor field-effect transistors (MOSFETs), regarding the same bias conditions during irradiation. The transistors were manufactured by using the 350 nm commercial bulk complementary metal-oxide semiconductor (CMOS) integrated-circuits (ICs) technology. The innovative hexagonal gate layout proposal can reduce the parameter deviations of TID effects in MOSFETs in, approximately, 30%, 400%, and 100% in terms of the threshold voltage, leakage drain current, and subthreshold slope, respectively, regarding the standard MOSFET counterparts. Therefore, the Diamond MOSFET can be considered as a low-cost alternative device to be used in space CMOS ICs applications. | |
dc.description.firstpage | 593 | |
dc.description.issuenumber | 3 | |
dc.description.lastpage | 595 | |
dc.description.volume | 17 | |
dc.identifier.citation | Luis Eduardo Seixas; GONCALVEZ, O. L.; SOUZA, R.; FINCO, SAULO; G., V. R.; Gabriel Augusto da Silva; GIMENEZ, S. P.. Improving MOSFETs TID Tolerance through Diamond Layout Style. IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY, v. 1, n. 1, p. 1-1, 2017. | |
dc.identifier.doi | 10.1109/TDMR.2017.2719959 | |
dc.identifier.issn | 1558-2574 | |
dc.identifier.uri | https://repositorio.fei.edu.br/handle/FEI/1312 | |
dc.relation.ispartof | IEEE Transactions on Device and Materials Reliability | |
dc.rights | Acesso Restrito | |
dc.subject.otherlanguage | Diamond MOSFET layout style | |
dc.subject.otherlanguage | radiation hardened by design (RHBD) | |
dc.subject.otherlanguage | TID effects | |
dc.title | Improving MOSFETs' TID Tolerance Through Diamond Layout Style | |
dc.type | Artigo | |
fei.scopus.citations | 12 | |
fei.scopus.eid | 2-s2.0-85023761528 | |
fei.scopus.subject | Comparative studies | |
fei.scopus.subject | Complementary metal-oxide-semiconductor (CMOS) integrated circuit | |
fei.scopus.subject | MOS-FET | |
fei.scopus.subject | Parameter deviations | |
fei.scopus.subject | Radiation hardened by design | |
fei.scopus.subject | Subthreshold slope | |
fei.scopus.subject | TID effects | |
fei.scopus.subject | Total ionizing dose effects | |
fei.scopus.updated | 2024-09-01 | |
fei.scopus.url | https://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=85023761528&origin=inward |