Artigos
URI permanente para esta coleçãohttps://repositorio.fei.edu.br/handle/FEI/798
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Resultados da Pesquisa
- In-depth low frequency noise evaluation of substrate rotation and strain engineering in N-type triple gate SOI Finfets(2015) Doria R.T.; De Souza M.A.S.; Martino J.A.; Simoen E.; Claeys C.; Pavanello M.A.© 2015 Elsevier B.V. All rights reserved.This work presents an experimental analysis of the low-frequency noise and the effective trap density of conventional, strained, rotated and strained-rotated SOI n-type FinFETs, respectively, for several fin widths biased at different gate voltages. Additionally, the profile of the effective trap density is presented along the depth of the gate dielectric of the devices. It is shown that strained devices present higher noise than conventional ones, independent on the fin width, which can be explained by poorer interface quality observed in strained devices. On the other hand, the low frequency noise of narrow rotated devices, where the main conduction path changes from top to sidewalls, has shown to reduce as the interface integrity is improved by substrate rotation. All the evaluated devices presented 1/f noise as the dominant noise component up to 1 kHz.
- Analog performance of standard and strained triple-gate silicon-on-insulator nFinFETs(2008) Pavanello M.A.; Martino J.A.; Simoen E.; Rooyackers R.; Collaert N.; Claeys C.This work shows a comparison between the analog performance of standard and strained Si n-type triple-gate FinFETs with high-κ dielectrics and TiN gate material. Different channel lengths and fin widths are studied. It is demonstrated that both standard and strained FinFETs with short channel length and narrow fins have similar analog properties, whereas the increase of the channel length degrades the early voltage of the strained devices, consequently decreasing the device intrinsic voltage gain with respect to standard ones. Narrow strained FinFETs with long channel show a degradation of the Early voltage if compared to standard ones suggesting that strained devices are more subjected to the channel length modulation effect. © 2008 Elsevier Ltd. All rights reserved.
- Harmonic distortion of 2-MOS structures for MOSFET-C filters implemented with n-type unstrained and strained FINFETS(2011) Doria R.T.; Simoen E.; Claeys C.; Martino J.A.; Pavanello M.A.This work investigates the harmonic distortion (HD) in 2-MOS balanced structures composed of triple gate FinFETs. HD has been evaluated through the determination of the third-order harmonic distortion (HD3), since this represents the major non-linearity source in balanced structures. The 2-MOS structures with devices of different channel lengths (L) and fin widths (W fin) have been studied operating in the linear region as tunable resistors. The analysis was performed as a function of the gate voltage, aiming to verify the correlation between operation bias and HD3. The physical origins of the non-linearities have been investigated and are pointed out. Being a resistive circuit, the 2-MOS structure is generally projected for a targeted on-resistance, which has also been evaluated in terms of HD3. The impact of the application of biaxial strain has been studied for FinFETs of different dimensions. It has been noted that HD3 reduces with the increase of the gate bias for all the devices and this reduction is more pronounced both in narrower and in longer devices. Also, the presence of strain slightly diminishes the non-linearity at a similar bias. However, a drawback associated with the use of strain engineering consists in a significant reduction of the on-resistance with respect to unstrained devices. © 2011 Elsevier Ltd. All rights reserved.
- Analysis of uniaxial and biaxial strain impact on the linearity of fully depleted SOI nMOSFETs(2007) Pavanello M.A.; Martino J.A.; Simoen E.; Claeys C.This work studies the impact of uniaxial, biaxial and combined uniaxial-biaxial strain on the linearity of nMOSFETs from a 65 nm fully depleted (FD) SOI technology. The total harmonic distortion (THD) and third-order harmonic distortion (HD3) will be used as figures of merit. Operation in saturation and triode regimes will be the focus. When biased in the saturation region short-channel devices have been used and biased as single-transistor amplifiers. In this case, at low voltage bias the use of any kind of strain improves the THD in comparison to standard SOI. When operating in linear region as a quasi-linear resistor longer devices were studied. For operation in linear regime the HD3 is nearly the same for all devices and no clear strain influence can be found at similar bias condition. If a target on-resistance is considered, the use of biaxially or combined unxially-biaxially strained films can provide a reduction on the required gate voltage overdrive or a reduction on the device channel width without degrading the HD3. © 2007 Elsevier Ltd. All rights reserved.