Artigos
URI permanente para esta coleçãohttps://repositorio.fei.edu.br/handle/FEI/798
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Resultados da Pesquisa
- Diamond layout style impact on SOI MOSFET in high temperature environment(2015) Gimenez S.P.; Galembeck E.H.S.; Renaux C.; Flandre D.© 2015 Elsevier Ltd.This work performs an experimental comparative study between the Diamond (hexagonal gate geometry) and Standard layouts styles for Metal-Oxide-Semiconductor Field Effect Transistor in high temperatures environment. The devices were manufactured with the 1 μm Silicon-on-Insulator CMOS technology. The results demonstrate that the Diamond SOI MOSFET is capable to keep active the Longitudinal Corner Effect and the Parallel Association of MOSFET with Different Channel Lengths Effect in high temperature conditions and consequently to continue presenting a better electrical performance than the one found in the conventional SOI MOSFET.
- Using diamond layout style to boost MOSFET frequency response of analogue IC(2014) Gimenez S.P.; Leoni R.D.; Renaux C.; Flandre D.A way to improve the metal-oxide-semiconductor field effect transistor (MOSFET) analogue electrical performance, still little explored, is to modify their aspect form or ratio (AR) by the use of innovative layout styles. The diamond MOSFET (DM) is an example of this approach. It presents hexagonal gate geometry. This new layout structure for MOSFET induces two additional effects in comparison with the conventional (i.e. rectangular gate geometry) MOSFET (CM) counterpart, which improves the device's electrical performance: the longitudinal corner effect (LCE) and parallel association of MOSFET with different channel length effect (PAMDLE). How the diamond layout style (DLS) can significantly enhance the device's frequency response (FR) by using two different integrated circuits' (IC) complementary metal-oxide-semiconductor (CMOS) manufacturing process technologies (bulk and silicon-on-insulator (SOI)) is demonstrated. © 2014 The Institution of Engineering and Technology.
- Impact of Using the Octagonal Layout for SOI MOSFETs in a High-Temperature Environment(2015) Gimenez S.P.; Galembeck E.H.S.; Renaux C.; Flandre D.© 2015 IEEE.The impact of high-temperature effects is experimentally investigated in the octagonal layout style for planar silicon-on-insulator (SOI) metal-oxide-semiconductor (MOS) field-effect transistors (MOSFETs), named OCTO SOI MOSFETs (OSMs), in relation to the hexagonal [diamond SOI MOSFETs (DSMs)] and the standard (rectangular conventional SOI MOSFETs) ones regarding the same bias conditions. The devices were manufactured with a 1-μ m fully depleted SOI complementary MOS (CMOS) technology. The main experimental findings demonstrate that OSM is capable of keeping active the longitudinal corner effect and the PArallel connection of MOSFET with Different channel Lengths Effect (PAMDLE) in its structure at high-temperature conditions, and consequently, it maintains its remarkably better electrical performance in comparison with the standard SOI MOSFET, mainly its capacity to reduce the leakage drain current, without causing any extra burden to the current planar SOI CMOS technology in relation to DSMs.