Engenharia Elétrica
URI permanente desta comunidadehttps://repositorio.fei.edu.br/handle/FEI/21
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3 resultados
Resultados da Pesquisa
- Global and/or local strain influence on p- and nMuGFET analog performance(2011-01-05) AGOPIAN, P. G. D.; MARTINO, J. A.; SIMOEN, E.; CLAEYS, C.In this work, the analog performance is evaluated for tri-gate p-and nMuGFETs processed with and without the implementation of different global or local strain engineering techniques. For n-channel devices, the intrinsic voltage gain showed to be worse for strained devices when the fin is narrow. Only for wider fins the voltage gain increases with the strain efficiency due to mobility enhancement. Besides the voltage gain, the transconductance, output conductance and Early Voltage are also evaluated. In spite of the smaller impact of strain engineering, pMuGFETs show better analog behavior for all studied parameters. ©The Electrochemical Society.
- Uniaxial and/or biaxial strain influence on MuGFET devices(2012-01-05) AGOPIAN, P. G. D.; MARTINO, J. A.; SIMOEN, E.; CLAEYS, C.In this work, the impact of global andor local strain engineering techniques on tri-gate p- and nMuGFETs performance is experimentally evaluated. Multiple gate structures were analyzed through basic and analog performance parameters for four different splits processed with different strain-engineering techniques (unstrained, uniaxial, biaxial and uniaxial+biaxial stress). While n-channel devices with narrow fins present a worse analog behavior, biaxial stress promotes the electron mobility for larger devices increasing the voltage gain. Besides the voltage gain, the transconductance, output conductance and Early Voltage are also evaluated. Although pMuGFETs are less affected by the strain engineering, they present better analog behavior for all studied devices. © 2012 The Electrochemical Society.
- Field effect transistors: From mosfet to Tunnel-Fet analog performance perspective(2014-10-31) MARTINO, J. A.; AGOPIAN, P. G. D.; SIMOEN, E.; CLAEYS, C.© 2014 IEEE.This paper will discuss the analog behavior of the main insulated gate field effect transistor (FET) roadmap, like Silicon-On-Insulator (SOI) MOSFET, Graded-Channel (GC) SOI MOSFET, triple-gate SOI FinFET and Tunnel-FET (TFET) devices. The main analog Figures of Merit (FoM) like transconductance over drain current ratio, Early voltage, intrinsic voltage gain and unit gain frequency will be analyzed.