Engenharia Elétrica
URI permanente desta comunidadehttps://repositorio.fei.edu.br/handle/FEI/21
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3 resultados
Resultados da Pesquisa
- Analysis of the substrate bias effect on the thermal properties of SOI UTBB transistors(2017-08-28) COSTA, F. J.; Marcelo Antonio Pavanello; TREVISOLI, R.; Rodrigo DoriaThis work presents an analysis of the thermal resistance of Ultra-Thin Body and Buried Oxide (UTBB) SOI (Silicon-on-Insulator) MOSFETs (Metal Oxide Semiconductor Field Effect Transistor) under a selected set of back gate biases (Vsub), with and without considering the effect of the ground plane. It has been shown that the thermal resistance increases as the substrate bias is reduced. For negative Vsub, a thicker depletion depth is induced by the back gate, confining the overall current closer to the front gate and increasing its density. A thermal resistance reduction of about 8-9% can be obtained by simply increasing the back bias from -2V up to 2 V.
- Analysis of the Thermal Properties of Self-Cascode Structures Composed by UTBB Transistors(2020) COSTA, F. J.; TREVISOLI, R.; Michelly De Souza; Rodrigo Doria© 2020 IEEE.The focus of this work is to perform an analysis of the thermal properties of the Self-Cascode (SC) structure composed by advanced UTBB SOI MOSFETs under a selected set of back gate biases, through 2D numerical simulations. In this work, it could be observed that the SC structure presents a 50 % lower thermal resistance in comparison with a single device with similar channel length. The application of a back gate bias of 2 V to the drain-sided device or -2 V to the source-sided devices of the SC has shown a decrease of 10-16 % in the thermal resistance.
- UTBB MOSFETs Thermal Coupling Analysis in Technological Node Level(2020-07-31) COSTA, F. J.; DORIA, R. T.; Rodrigo Trevisoli DoriaThe main goal of this work is to perform a first-time analysis of the thermal cross-coupling in a system composed by some devices in an integration node degree composed by advanced UTBB SOI MOSFETs through numerical simulations, validated with experimental data from the literature. In this analysis, it could be observed that devices located on the channel length direction provoke a reduced thermal coupling and devices with their drain region next to each other suffer of an increased thermal coupling due to the lumped thermal energy. It also could be observed a degradation in some electrical parameters and in the thermal properties of a device under the influence of surrounded devices biased.