Analysis of the Thermal Properties of Self-Cascode Structures Composed by UTBB Transistors
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Tipo de produção
Artigo de evento
Data de publicação
2020
Texto completo (DOI)
Periódico
LAEDC 2020 - Latin American Electron Devices Conference
Editor
Texto completo na Scopus
Citações na Scopus
0
Autores
COSTA, F. J.
TREVISOLI, R.
Michelly De Souza
Rodrigo Doria
Orientadores
Resumo
© 2020 IEEE.The focus of this work is to perform an analysis of the thermal properties of the Self-Cascode (SC) structure composed by advanced UTBB SOI MOSFETs under a selected set of back gate biases, through 2D numerical simulations. In this work, it could be observed that the SC structure presents a 50 % lower thermal resistance in comparison with a single device with similar channel length. The application of a back gate bias of 2 V to the drain-sided device or -2 V to the source-sided devices of the SC has shown a decrease of 10-16 % in the thermal resistance.
Citação
COSTA, F. J.; TREVISOLI, R.; DE SOUZA, M.; DORIA, R. Analysis of the Thermal Properties of Self-Cascode Structures Composed by UTBB Transistors. LAEDC 2020 - Latin American Electron Devices Conference, 2020.
Palavras-chave
Keywords
Self-Cascode; Self-Heating; Thermal Resistance; UTBB
Assuntos Scopus
2-D numerical simulation; Back-gate bias; Channel length; SC structures; Self-cascode; SOI-MOSFETs