Engenharia Elétrica

Resultados da Pesquisa

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Use of back gate bias to improve the performance of n- and p-type UTBB transistors-based self-cascode structures applied to current mirrors
(2017-10-10) Rodrido Doria; TREVISOLI, R.; Michelly De Souza; Marcelo Antonio Pavanello; FLANDRE, D.
This paper aims at demonstrating, for the first time, the use of back bias to improve the analog performance of current mirrors composed by self-cascode structures with 25 nm-long n- and p-type UTBB SOI MOSFETs. The use of back gate bias has shown to enhance the intrinsic gain of p-type devices by about 7 dB, making it higher than the one from a single device with equivalent channel length whereas the mirroring precision has shown to be improved by 20 % with respect to single devices.
Low power highly linear temperature sensor based on SOI lateral PIN diodes
(2017) Michelly De Souza; Marcelo Antonio Pavanello; FLANDRE, D.
This work presents a highly linear temperature sensors implemented with SOI Lateral PIN Diodes, for low-power applications, biased on the exponential region of the I-V characteristics. Experimental results are shown for temperatures ranging between 150 K and 400 K, showing that depending on the selected bias currents, the linearity can be improved in comparison to a single SOI PIN diode. Simulations results show that the sensing range can be extended for both lower and higher temperatures maintaining high linearity.