Repositório do Conhecimento Institucional do Centro Universitário FEI
 

Engenharia Elétrica

URI permanente desta comunidadehttps://repositorio.fei.edu.br/handle/FEI/21

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Resultados da Pesquisa

Agora exibindo 1 - 2 de 2
  • Artigo de evento 6 Citação(ões) na Scopus
    Analog performance improvement of self-cascode structures composed by UTBB transistors using back gate bias
    (2015-11-20) Rodrido Doria; TREVISOLI, R.; Michelly De Souza; Marcelo Antonio Pavanello; FLANDRE, D.
    This paper explores the use of the back gate bias to enhance the analog performance of self-cascode structures composed by 25nm-long UTBB SOI MOSFETs. It is shown, for the first time, that the use of back gate bias can improve the intrinsic voltage gain by 15 dB, making it larger than the one presented by a 50nm-long single device.
  • Artigo de evento 2 Citação(ões) na Scopus
    Advantages of subthreshold operation of asymmetric self-cascode SOI transistors aiming at analog circuit applications
    (2015-11-20) Michelly De Souza; Marcelo Antonio Pavanello; FLANDRE, D.
    This paper presents the analog characteristics of asymmetric self-cascode SOI nMOSFETs biased in subthreshold region aiming at low power low voltage analog applications. It is shown for the first time that the advantages of this structure in comparison to single transistors and symmetric self-cascode is sustained below threshold and improves as device moves to subthreshold.