Departamento de Física
URI permanente desta comunidadehttps://repositorio.fei.edu.br/handle/FEI/785
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10 resultados
Resultados da Pesquisa
- Evaluating the Reliability of Different Voting Schemes for Fault Tolerant Approximate Systems(2023-06-20) BALEN, T. R.; GONZALEZ, C. J.; OLIVEIRA, I. F. V.; DA ROSA JR. L. S.; SOARES, R. I.; SCHVITTZ, R. B.; ADDED, N.; MACCHIONE, E. L. A.; AGUIAR, V. A. P.; Marcilei Aparecida Guazzelli; MEDINA, N. H.; BUTZEN, P. F.© 2023, The Author(s), under exclusive licence to Springer Science+Business Media, LLC, part of Springer Nature.This work presents a study on the reliability of voters for approximate fault tolerant systems in the context of single event effects and electromagnetic interference. A first case study analyses different topologies of single-bit majority voters for logic circuits employing fault injection by simulation. In these simulations, an analysis is first performed to identify the critical diffusion areas of the physical implementation according to the voter input vector. Additionally, as a second case study, practical heavy ion experiments on different architectures of software-based approximate voters for mixed-signal applications are also presented, and the cross section of each voter is evaluated. The system comprising the voters was irradiated in two distinct experiments with an 16O ion beam, producing an effective LET at the active region of 5.5 MeV/mg/cm 2 . As a complementary study, a conducted electromagnetic interference injection was also performed, considering two distinct voting schemes. Results of the case-studies allow identifying the most tolerant voter architectures (among the studied ones) for approximate computing applications under single event effects and electromagnetic interference.
- Heavy-Ion-Induced Avalanche Multiplication in Low-Voltage Power VDMosfet(2021-09-13) ALBERTON. S. G.; MEDINA, N. H.; ADDED, N.; AGUIAR, V. A. P.; Marcilei Aparecida Guazzelli; Roberto Santos© 2021 IEEE.Lackner's theory for avalanche multiplication in semiconductor devices provides physical interpretation for the model parameters and obtaining them through experimental methods is necessary. In this work, the charge collection mechanisms of heavy-ion-induced avalanche multiplication in power MOSFETs are studied based on Lackner's impact ionization model. The heavy-ion-induced impact ionization coefficients were estimated by comparing collected charge values obtained from computational simulations and experimental measurements.
- Neutron-Induced Radiation Effects in UMOS Transistor(2022-01-05) ALBERTON. S. G.; BOAS, A. C. V.; MEDINA, N. H.; Marcilei Aparecida Guazzelli; AGUIAR, V. A. P.; ADDED, N.; FEDERICO, C. A.; GONZALEZ, O. L.; CAVALCANTE, T. C.; PEREIRA, E. C. F.; VAZ, R. G.© 2022 Institute of Physics Publishing. All rights reserved.Ground level electronics and avionics systems may suffer from radiation effects induced by neutrons. Neutrons can induce radiation effects in electronic devices via fusion-evaporation nuclear reactions, but few studies have been reported for technologies such as UMOSFET. In this work, estimates and experimental studies on neutron-induced radiation effects via nuclear reactions in a Si-based UMOSFET are presented. Methods for probability estimates of neutron-induced Single-Event Effects (SEEs) in Si-based power transistors and neutron beam energy measurement is presented. The energy spectrum of a UMOSFET subject to fast neutron irradiation was then compared to that of a high charge collection efficiency silicon particle detector.
- First successful SEE measurements with heavy ions in Brazil(2014-07-18) MEDINA, N. H.; Marcilei Aparecida Guazzelli; ADDED, N.; AGUIAR. V. A . P.; Renato Giacomini; MACHIONE, E. L. A.; DE MELO, M. A. A.; SANTOS, R. B. B.; SEIXAS, L. E.© 2014 IEEE.In this work, the first successful SEE measurements with heavy ions in Brazil is reported. The heavy ions were produced at the São Paulo 8 UD Pelletron accelerator. 12C, 16O, 19F, 28Si, 35Cl, 63Cu and 107Ag heavy ion beams were used to test a commercial off-the-shelf transistor. During irradiation, the response of a pMOS transistor was continuously monitored to measure the SEE events. In order to achieve a uniform low intensity beam the heavy ions were Rutherford scattered at 15 by a 275 μg/cm2 gold foil.
- Analyzing the influence of the angles of incidence on SEU and MBU events induced by low LET heavy ions in a 28-nm SRAM-based FPGA(2017) TONFAT, J.; KASTENSMIDT, F. L.; ARTOLA, L.; HUBERT, G.; MEDINA, N. H.; ADDED, N.; AGUIAR, V. A. P.; AGUIRRE, F.; MACCHIONE, E. L. A.; Marcilei Aparecida Guazzelli© 2016 IEEE.This work highlights the impact of low LET heavy ions particles on the reliability of 28-nm Bulk SRAM cells from 4rtix-7 FPGA. Radiation tests showed significant differences in he MBU cross section of configuration (CRAM) and BRAM memory cells under various angles of incidence. Radiation results re compared with simulations at transistor level by using the ioft error tool, MUSCA SEP3 (MUlti-SCAle Single Event henomenon Prediction Platform) coupled with circuit imulations with the aim to analyze the differences of upset ensitivity as a function of layout SRAM. This analysis leads to etermine the correct layout and technology used in the tested PGA. By using the detailed classification of MBU events, it is ossible to analyze the effectiveness of correction mechanisms of he FPGA configuration memory.
- Reducing Soft Error Rate of SoCs Analog-to-Digital Interfaces with Design Diversity Redundancy(2020-03-05) GONZALEZ, C. J.; ADDED, N.; MACCHIONE, E. L. A.; AGUIAR, V. A. P.; KASTENSMIDT, F. G. L.; PUCHNER, H. K.; Marcilei Aparecida Guazzelli; MEDINA, N. H.; BALEN, T. R.© 1963-2012 IEEE.In this article, a commercial programmable system-on-chip (PSoC 5, from Cypress Semiconductor) is tested under heavy-ion irradiation with a focus on the analog-to-digital interface blocks of the system. For this purpose, a data acquisition system (DAS) was programmed into the device under test and protected with a design diversity redundancy technique. This technique implements different levels of diversity (architectural and temporal) by using two different architectures of converters (a Σ Δ converter and two successive approximation register (SAR) converters) operating with distinct sampling rates. The experiment was performed in a vacuum chamber, using a 16O ion beam with 36-MeV energy and sufficient penetration into the silicon to produce an effective linear energy transfer (LET) of 5.5 MeV/mg/cm2 at the active region. The average flux was approximately 350 particles/s/cm2 for 246 min. The individual susceptibility of each converter to single-event effects is evaluated, as well as the whole system cross section. Results show that the proposed technique is effective to mitigate errors originating at the converters since 100% of such errors were corrected by using the diversity redundancy technique. Results also show that the processing unit of the system is susceptible to hangs that can be mitigated using watchdog techniques.
- Reliability-Performance Analysis of Hardware and Software Co-Designs in SRAM-Based APSoCs(2018) Tambara L.A.; Kastensmidt F.L.; Rech P.; Lins F.; Medina N.H.; Added N.; Aguiar V.A.P.; Silveira M.A.G.© 1963-2012 IEEE.All programmable system-on-chip (APSoC) devices provide higher system performance and programmable flexibility at lower costs compared to standalone field-programmable gate array devices and processors. Unfortunately, it has been demonstrated that the high complexity and density of APSoCs increase the system's susceptibility to radiation-induced errors. This paper investigates the effects of soft errors on APSoCs at design level through reliability and performance analyses. We explore 28 different hardware and software co-designs varying the workload distribution between hardware and software. We also propose a reliability analysis flow based on fault injection (FI) to estimate the reliability trend of hardware-only and software-only designs and hardware-software co-designs. Results obtained from both radiation experiments and FI campaigns reveal that performance and reliability can be improved up to 117× by offloading the workload of an APSoC-based system to its programmable logic core. We also show that the proposed flow is a precise method to estimate the reliability trend of system designs on APSoCs before radiation experiments.
- Analyzing the Influence of the Angles of Incidence and Rotation on MBU Events Induced by Low LET Heavy Ions in a 28-nm SRAM-Based FPGA(2017) Tonfat J.; Kastensmidt F.L.; Artola L.; Hubert G.; Medina N.H.; Added N.; Aguiar V.A.P.; Aguirre F.; Macchione E.L.A.; Silveira M.A.G.© 1963-2012 IEEE.This paper shows the impact of low linear energy transfer heavy ions on the reliability of 28-nm Bulk static random access memory (RAM) cells from Artix-7 field-programmable gate array. Irradiation tests on the ground showed significant differences in the multiple bit upset cross section of configuration RAM and block RAM memory cells under various angles of incidence and rotation of the device. Experimental data are analyzed at transistor level by using the single-event effect prediction tool called multiscale single-event phenomenon prediction platform coupled with SPICE simulations.
- Analyzing Reliability and Performance Trade-Offs of HLS-Based Designs in SRAM-Based FPGAs under Soft Errors(2017) Tambara L.A.; Tonfat J.; Santos A.; Kastensmidt F.L.; Medina N.H.; Added N.; Aguiar V.A.P.; Aguirre F.; Silveira M.A.G.© 1963-2012 IEEE.The increasing system complexity of FPGA-based hardware designs and shortening of time-to-market have motivated the adoption of new designing methodologies focused on addressing the current need for high-performance circuits. High-Level Synthesis (HLS) tools can generate Register Transfer Level (RTL) designs from high-level software programming languages. These tools have evolved significantly in recent years, providing optimized RTL designs, which can serve the needs of safety-critical applications that require both high performance and high reliability levels. However, a reliability evaluation of HLS-based designs under soft errors has not yet been presented. In this work, the trade-offs of different HLS-based designs in terms of reliability, resource utilization, and performance are investigated by analyzing their behavior under soft errors and comparing them to a standard processor-based implementation in an SRAM-based FPGA. Results obtained from fault injection campaigns and radiation experiments show that it is possible to increase the performance of a processor-based system up to 5,000 times by changing its architecture with a small impact in the cross section (increasing up to 8 times), and still increasing the Mean Workload Between Failures (MWBF) of the system.
- Experimental setup for Single Event Effects at the São Paulo 8UD Pelletron Accelerator(2014) Aguiar V.A.P.; Added N.; Medina N.H.; Macchione E.L.A.; Tabacniks M.H.; Aguirre F.R.; Silveira M.A.G.; Santos R.B.B.; Seixas Jr. L.E.In this work we present an experimental setup mounted in one of the beam lines at the São Paulo 8UD Pelletron Accelerator in order to study Single Event Effects in electronic devices. The basic idea is to use elastic scattering collisions to achieve a low-flux with a high-uniformity ion beam to irradiate several devices. 12C, 16O, 28Si, 35Cl and 63Cu beams were used to test the experimental setup. In this system it is possible to use efficiently LET values of 17 MeV/mg/cm2 for an external beam arrangement and up to 32 MeV/mg/cm2 for in-vacuum irradiation. © 2014 Elsevier B.V. All rights reserved.