The role of the incomplete ionization on the operation of Junctionless Nanowire Transistors

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dc.contributor.authorTREVISOLI, R. D.
dc.contributor.authorRodrido Doria
dc.contributor.authorMichelly De Souza
dc.contributor.authorFERAIN, I.
dc.contributor.authorDAS, S.
dc.contributor.authorPavanello M.A.
dc.contributor.authorOrcidhttps://orcid.org/0000-0003-1361-3650
dc.contributor.authorOrcidhttps://orcid.org/0000-0001-6472-4807
dc.contributor.authorOrcidhttps://orcid.org/0000-0003-4448-4337
dc.date.accessioned2022-01-12T22:02:16Z
dc.date.available2022-01-12T22:02:16Z
dc.date.issued2012-10-04
dc.description.abstractThe use of planar MOS devices for the sub-20 nm era has become a great challenge due to the loss of the gate control on the channel charges [1]. Multi-gate architecture provides a better electrostatic control, allowing a higher degree of miniaturization [1]. One of the major drawbacks of either planar or multi-gate extremely short devices is the formation of p-n junctions between source/drain and the channel, which requires precise thermal conditions in order to avoid the impurities diffusion into the channel. In this context, Junctionless Nanowire Transistors (JNTs) have been developed [2-3]. They consist of heavy doped silicon nanowires (N+ for nMOS and P+ for pMOS) surrounded by a gate stack. The device is doped from source to drain with the same element type and concentration, such that there are no gradients or junctions. Fig. 1 presents a schematic view (A) and the longitudinal section (B) of an nMOS JNT. These devices are based on bulk conduction [4] and have shown to provide better subthreshold slope, DIBL and analog properties than inversion-mode devices of similar dimensions [5-6]. Recent papers have shown the temperature (7) influence on the behavior of JNTs [7-8]. The main characteristic was the absence of the zero temperature coefficient (ZTC) bias, i.e. a point in which the drain current is almost the same independently of the temperature. In these papers, this absence has been attributed to the higher threshold voltage (Vm) and the lower mobility (μ) dependences on T [7]. This paper shows that JNTs can present a ZTC bias, which strongly depends on the series resistance. © 2012 IEEE.
dc.identifier.citationTREVISOLI, R. D. ; DORIA, R.; DE SOUZA, M.; FERAIN, I.; DAS, S.; PAVANELLO, M. A. The role of the incomplete ionization on the operation of Junctionless Nanowire Transistors. Proceedings - IEEE International SOI Conference. Oct. 2012.
dc.identifier.doi10.1109/SOI.2012.6404384
dc.identifier.urihttps://repositorio.fei.edu.br/handle/FEI/4124
dc.relation.ispartofProceedings - IEEE International SOI Conference
dc.rightsAcesso Restrito
dc.titleThe role of the incomplete ionization on the operation of Junctionless Nanowire Transistors
dc.typeArtigo de evento
fei.scopus.citations2
fei.scopus.eid2-s2.0-84873528655
fei.scopus.subjectBulk conduction
fei.scopus.subjectChannel charge
fei.scopus.subjectDoped silicon
fei.scopus.subjectElectrostatic control
fei.scopus.subjectElement type
fei.scopus.subjectGate control
fei.scopus.subjectGate stacks
fei.scopus.subjectImpurities diffusion
fei.scopus.subjectIncomplete ionization
fei.scopus.subjectJunctionless
fei.scopus.subjectLongitudinal section
fei.scopus.subjectMulti-gates
fei.scopus.subjectNanowire transistors
fei.scopus.subjectP-n junction
fei.scopus.subjectSeries resistances
fei.scopus.subjectSubthreshold slope
fei.scopus.subjectThermal condition
fei.scopus.subjectZero temperature coefficients
fei.scopus.updated2024-07-01
fei.scopus.urlhttps://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=84873528655&origin=inward
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