Different stress techniques and their efficiency on triple-gate SOI n-MOSFETs

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Buhler R.T.
Agopian P.G.D.
Collaert N.
Simoen E.
Claeys C.
Martino J.A.
Solid-State Electronics
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BÜHLER, R. T.; Agopian, P. G. D.; COLLAERT, N.; Simoen, E.; CLAEYS, C.; Martino, J A. Different stress techniques and their efficiency on triple-gate SOI n-MOSFETs. SOLID-STATE ELECTRONICS, v. 103, p. 209-215, 2015.
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© 2014 Elsevier Ltd. All rights reserved.Three techniques to implement mechanical stress in n-channel Multiple Gate MOSFETs (MuGFETs) are investigated through 3D simulations and transconductance measurements. They are: uniaxial stress, biaxial stress and biaxial + uniaxial stress. Four different fin dimensions are evaluated: a narrow and a wide transistor, combined with a short or a long device. It is shown that the stress distribution and the device performance exhibit a dependence on the fin dimensions. For uniaxially strained devices, the dimensions are important as the bending of the silicon required to induce stress in the channel depends on its size. However, for biaxially strained devices the plane of etching in the silicon fin is important, determining the degradation of the stress components. The combination of the two types of stress results in an improvement of some stress components and an overall improvement in the maximum transconductance.