Analysis of the Thermal Properties of Self-Cascode Structures Composed by UTBB Transistors
dc.contributor.author | COSTA, F. J. | |
dc.contributor.author | TREVISOLI, R. | |
dc.contributor.author | Michelly De Souza | |
dc.contributor.author | Rodrigo Doria | |
dc.contributor.authorOrcid | https://orcid.org/0000-0001-6472-4807 | |
dc.contributor.authorOrcid | https://orcid.org/0000-0003-4448-4337 | |
dc.date.accessioned | 2022-01-12T21:55:25Z | |
dc.date.available | 2022-01-12T21:55:25Z | |
dc.date.issued | 2020 | |
dc.description.abstract | © 2020 IEEE.The focus of this work is to perform an analysis of the thermal properties of the Self-Cascode (SC) structure composed by advanced UTBB SOI MOSFETs under a selected set of back gate biases, through 2D numerical simulations. In this work, it could be observed that the SC structure presents a 50 % lower thermal resistance in comparison with a single device with similar channel length. The application of a back gate bias of 2 V to the drain-sided device or -2 V to the source-sided devices of the SC has shown a decrease of 10-16 % in the thermal resistance. | |
dc.identifier.citation | COSTA, F. J.; TREVISOLI, R.; DE SOUZA, M.; DORIA, R. Analysis of the Thermal Properties of Self-Cascode Structures Composed by UTBB Transistors. LAEDC 2020 - Latin American Electron Devices Conference, 2020. | |
dc.identifier.doi | 10.1109/LAEDC49063.2020.9073154 | |
dc.identifier.uri | https://repositorio.fei.edu.br/handle/FEI/3657 | |
dc.relation.ispartof | LAEDC 2020 - Latin American Electron Devices Conference | |
dc.rights | Acesso Restrito | |
dc.subject.otherlanguage | Self-Cascode | |
dc.subject.otherlanguage | Self-Heating | |
dc.subject.otherlanguage | Thermal Resistance | |
dc.subject.otherlanguage | UTBB | |
dc.title | Analysis of the Thermal Properties of Self-Cascode Structures Composed by UTBB Transistors | |
dc.type | Artigo de evento | |
fei.scopus.citations | 0 | |
fei.scopus.eid | 2-s2.0-85084967502 | |
fei.scopus.subject | 2-D numerical simulation | |
fei.scopus.subject | Back-gate bias | |
fei.scopus.subject | Channel length | |
fei.scopus.subject | SC structures | |
fei.scopus.subject | Self-cascode | |
fei.scopus.subject | SOI-MOSFETs | |
fei.scopus.updated | 2024-07-01 | |
fei.scopus.url | https://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=85084967502&origin=inward |