Adaption of triple gate junctionless MOSFETs analytical compact model for accurate circuit design in a wide temperature range
N/D
Tipo de produção
Artigo de evento
Data de publicação
2018-03-19
Texto completo (DOI)
Periódico
2018 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon, EUROSOI-ULIS 2018
Editor
Texto completo na Scopus
Citações na Scopus
0
Autores
CERDEIRA, A.
AVILA-HERRERA, F.
ESTRADA, M.
DORIA, R. T.
Marcelo Antonio Pavanello
Orientadores
Resumo
This paper presents the necessary adaptions on the proposed compact analytical model of triple gate junctionless nanowire transistors for accurate description of device electrical characteristics in a wide temperature range. The model validation is performed by comparison against experimental results showing very good agreement, with continuous current and its derivatives in all regions of operation and temperatures.
Citação
CERDEIRA, A.; AVILA-HERRERA, F.; ESTRADA, M.; DORIA, R. T.; PAVANELLO, M. A. Adaption of triple gate junctionless MOSFETs analytical compact model for accurate circuit design in a wide temperature range. 2018 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon, EUROSOI-ULIS 2018, p. 1-4, 2018
Palavras-chave
Keywords
compact model; Junctioless nanowire transistor; temperature
Assuntos Scopus
Circuit designs; Compact model; Electrical characteristic; Model validation; MOSFETs; Nanowire transistors; Triple-gate; Wide temperature ranges