Boosting the SOI MOSFET Electrical Performance by Using the Octagonal Layout Style in High Temperature Environment

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dc.contributor.authorGALEMBECK, EGON H.S.
dc.contributor.authorRENAUX, CHRISTIAN
dc.contributor.authorFLANDRE, Denis
dc.contributor.authorFINCO, SAULO
dc.contributor.authorGIMENEZ, SALVADOR P.
dc.date.accessioned2019-08-19T23:45:29Z
dc.date.available2019-08-19T23:45:29Z
dc.date.issued2017
dc.description.firstpage1
dc.description.issuenumber1
dc.description.lastpage1
dc.description.volume17
dc.identifier.citationGALEMBECK, EGON H.S.; RENAUX, CHRISTIAN; FLANDRE, Denis; FINCO, SAULO; GIMENEZ, SALVADOR P.. Boosting the SOI MOSFET Electrical Performance by Using the Octagonal Layout Style in High Temperature Environment. IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY, v. 17, n. 1, p. 1-1, 2017.
dc.identifier.doi10.1109/tdmr.2017.2652729
dc.identifier.issn1530-4388
dc.identifier.urihttps://repositorio.fei.edu.br/handle/FEI/1313
dc.relation.ispartofIEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY
dc.rightsAcesso Restrito
dc.titleBoosting the SOI MOSFET Electrical Performance by Using the Octagonal Layout Style in High Temperature Environmentpt_BR
dc.typeArtigopt_BR
fei.scopus.citations9
fei.scopus.eid2-s2.0-85017587917
fei.scopus.updated2024-03-04
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