Radiation hardness aspects of advanced FinFET and UTBOX devices

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dc.contributor.authorCLAEYS, C.
dc.contributor.authorAOULAICHE, M.
dc.contributor.authorSIMOEN. E.
dc.contributor.authorGRIFFONI, A.
dc.contributor.authorKOBAYASHI, D.
dc.contributor.authorMAHATME, N. N.
dc.contributor.authorREED. R. A.
dc.contributor.authorSCHRUMPF, R. D.
dc.contributor.authorAGOPIAN, P. G. D.
dc.contributor.authorMARTINO, J. A.
dc.date.accessioned2022-01-12T22:02:15Z
dc.date.available2022-01-12T22:02:15Z
dc.date.issued2012-10-04
dc.description.abstractThe stringent requirements imposed by the ITRS rely on the introduction of alternative and/or new gate concepts and the implementation of advanced processing modules and materials[1]. During the last decade, alternative gate concepts, with an evolution from planar single gate to double gate, multi-gate FET (MugFET) or FinFET, and gate-all-around (GAA) or nanowire concepts have been extensively studied [2]. Although manufacturing issues have delayed their introduction in production lines, FinFET and MuGFET structures are presently being used for 22 nm technologies. The use of SOI devices leads to an improved radiation performance concerning single event upsets and latch-up [3], but can become worse for micro-dose effects and from a total ionizing dose point of view because of the radiation-induced interface states and trapped charge in the buried oxide [4]. © 2012 IEEE.
dc.identifier.citationCLAEYS, C.; AOULAICHE, M.; SIMOEN. E.; GRIFFONI, A.; KOBAYASHI, D.; MAHATME, N. N.; REED. R. A.; SCHRUMPF, R. D.; AGOPIAN, P. G. D.; MARTINO, J. A. Radiation hardness aspects of advanced FinFET and UTBOX devices. Proceedings - IEEE International SOI Conference, Oct. 2012.
dc.identifier.doi10.1109/SOI.2012.6404372
dc.identifier.urihttps://repositorio.fei.edu.br/handle/FEI/4123
dc.relation.ispartofProceedings - IEEE International SOI Conference
dc.rightsAcesso Restrito
dc.titleRadiation hardness aspects of advanced FinFET and UTBOX devices
dc.typeArtigo de evento
fei.scopus.citations2
fei.scopus.eid2-s2.0-84873536170
fei.scopus.subjectBuried oxides
fei.scopus.subjectDouble gate
fei.scopus.subjectGate-all-around
fei.scopus.subjectLatch-ups
fei.scopus.subjectManufacturing issue
fei.scopus.subjectMulti-Gate FETS
fei.scopus.subjectPoint of views
fei.scopus.subjectProcessing modules
fei.scopus.subjectProduction line
fei.scopus.subjectRadiation hardness
fei.scopus.subjectRadiation performance
fei.scopus.subjectRadiation-induced
fei.scopus.subjectSingle event upsets
fei.scopus.subjectSingle gates
fei.scopus.subjectSOI devices
fei.scopus.subjectStringent requirement
fei.scopus.subjectTotal Ionizing Dose
fei.scopus.subjectTrapped charge
fei.scopus.updated2024-07-01
fei.scopus.urlhttps://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=84873536170&origin=inward
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