Simulation analysis of the fin height influence on the electrical parameters of junctionless nanowire transistors

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dc.contributor.authorRIBEIRO, T. A.
dc.contributor.authorCERDEIRA, A.
dc.contributor.authorMarcelo Antonio Pavanello
dc.contributor.authorOrcidhttps://orcid.org/0000-0003-1361-3650
dc.date.accessioned2022-01-12T21:57:37Z
dc.date.available2022-01-12T21:57:37Z
dc.date.issued2018-05-13
dc.description.abstractThis work analyzes the effects of the fin height on the electrical parameters of junctionless transistors through experimentally calibrated 3-D simulations. Results show that for long channel devices the better compromise is obtained with higher fin height, with higher ION/IOFF and smaller values of SS and DIBL, whereas for short channel ones the better compromise is found with smaller fin height, due to the reduced SS and DIBL and increased ION/IOFF ratio.
dc.description.firstpage85
dc.description.issuenumber8
dc.description.lastpage90
dc.description.volume85
dc.identifier.citationRIBEIRO, T. A.; CERDEIRA, A.; PAVANELLO, M. A. Simulation analysis of the fin height influence on the electrical parameters of junctionless nanowire transistors. ECS Transactions, v. 85, n. 8, p. 85-90, Mayo, 2018.
dc.identifier.doi10.1149/08508.0085ecst
dc.identifier.issn1938-5862
dc.identifier.urihttps://repositorio.fei.edu.br/handle/FEI/3805
dc.relation.ispartofECS Transactions
dc.rightsAcesso Restrito
dc.titleSimulation analysis of the fin height influence on the electrical parameters of junctionless nanowire transistors
dc.typeArtigo de evento
fei.scopus.citations1
fei.scopus.eid2-s2.0-85050110710
fei.scopus.subject3D simulations
fei.scopus.subjectElectrical parameter
fei.scopus.subjectFin height
fei.scopus.subjectJunctionless transistors
fei.scopus.subjectLong channel devices
fei.scopus.subjectNanowire transistors
fei.scopus.subjectShort channels
fei.scopus.subjectSimulation analysis
fei.scopus.updated2025-02-01
fei.scopus.urlhttps://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=85050110710&origin=inward
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