A Customized Genetic Algorithm with In-Loop Robustness Analyses to Boost the Optimization Process of Analog CMOS ICs

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dc.contributor.advisorCreative Commons "Este é um artigo publicado em acesso aberto sob uma licença Creative Commons (CC BY-NC-ND 4.0). Fonte: https://www.sciencedirect.com/science/article/pii/S0026269218306049?via%3Dihub. Acesso em: 17 nov. 2021.
dc.contributor.authorMORETO, RODRIGO ALVES DE LIMA
dc.contributor.authorTHOMAZ, CARLOS EDUARDO
dc.contributor.authorGIMENEZ, SALVADOR PINILLOS
dc.contributor.authorOrcidhttps://orcid.org/0000-0001-5566-1963
dc.contributor.authorOrcidhttps://orcid.org/0000-0002-3616-9559
dc.date.accessioned2021-11-17T21:19:23Z
dc.date.available2021-11-17T21:19:23Z
dc.date.issued2019-10-05
dc.description.abstractThe traditional optimization processes of analog complementary metal-oxide-semiconductor (CMOS) integrated circuits (ICs) are very complex, slow, and based on the designers’ experience. To obtain robust potential solutions, it is necessary to perform robustness analyses (RAs) through SPICE simulations. However, this approach represents a huge bottleneck in the optimization processes due to the significant increase of time of the SPICE simulations concerning the RAs. Therefore, this work proposes an innovative customized genetic algorithm (GA) to boost the optimization process of analog CMOS ICs. The main results obtained showed that all designs of analog CMOS ICs reached a yield of 100% and a remarkable reduction of the optimization time (from 23% to 79%) in comparison with the standard optimization process with the GA, without reducing the random samples number considered in the RAs, and consequently preserving their robustness accuracy.
dc.description.firstpage1
dc.description.lastpage12
dc.description.volume92
dc.identifier.citationMORETO, R. A. L.; THOMAZ, C. E.; GIMENEZ, S. P. A Customized genetic algorithm with In-Loop robustness analyses to boost the optimization process of analog CMOS ICs. MICROELECTRONICS JOURNAL, v. 92, p. 1-12, 2019.
dc.identifier.doi10.1016/j.mejo.2019.07.013
dc.identifier.issn0026-2692
dc.identifier.urihttps://repositorio.fei.edu.br/handle/FEI/3466
dc.relation.ispartofMICROELECTRONICS JOURNAL
dc.rightsAcesso Aberto
dc.subjectAnalog CMOS ICs design
dc.subjectEvolutionary electronics
dc.subjectGenetic algorithm
dc.subjectCorner analysis
dc.subjectOptimization process
dc.subjectMonte Carlo analysis
dc.titleA Customized Genetic Algorithm with In-Loop Robustness Analyses to Boost the Optimization Process of Analog CMOS ICspt_BR
dc.typeArtigopt_BR
fei.source.urlhttps://www.sciencedirect.com/science/article/pii/S0026269218306049?via%3Dihub
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