The roles of the gate bias, doping concentration, temperature and geometry on the harmonic distortion of junctionless nanowire transistors operating in the linear regime

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dc.contributor.authorRodrigo Doria
dc.contributor.authorTREVISOLI, R.
dc.contributor.authorMichelly De Souza
dc.contributor.authorESTRADA, M.
dc.contributor.authorCERDEIRA, A.
dc.contributor.authorMarcelo Antonio Pavanello
dc.contributor.authorOrcidhttps://orcid.org/0000-0003-4448-4337
dc.contributor.authorOrcidhttps://orcid.org/0000-0001-6472-4807
dc.contributor.authorOrcidhttps://orcid.org/0000-0003-1361-3650
dc.date.accessioned2023-08-26T23:48:44Z
dc.date.available2023-08-26T23:48:44Z
dc.date.issued2014-05-05
dc.description.abstract© 2014, Journal of Integrated Circuits and Systems 2014. All rights received.The linearity of Junctionless nanowire transistors operating in the linear regime has been evaluated through experimental data and numerical simulations. The influences of the fin width, the gate bias, the temperature, the doping concentration and the geometry on the overall linearity have been evaluated. The increase of the series resistance associated both to the variation of the physical parameters and the incomplete ionization effect has shown to improve the second order distortion and degrade the third order one.
dc.description.firstpage110
dc.description.issuenumber2
dc.description.lastpage117
dc.description.volume9
dc.identifier.citationDORIA, R.; TREVISOLI, R.; DE SOUZA, M.; ESTRADA, M.; CERDEIRA, A.; PAVANELLO, M. A. The roles of the gate bias, doping concentration, temperature and geometry on the harmonic distortion of junctionless nanowire transistors operating in the linear regime. Journal of Integrated Circuits and Systems, v. 9, n. 2, p. 110-117, 2014.
dc.identifier.issn1872-0234
dc.identifier.urihttps://repositorio.fei.edu.br/handle/FEI/4930
dc.relation.ispartofJournal of Integrated Circuits and Systems
dc.rightsAcesso Restrito
dc.rights.licenseOpen Journal Systems "Este é um artigo publicado em acesso aberto sob uma licença de código aberto (GPL v2). Fonte: https://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=84919780372&origin=inward. Acesso em: 04 jun. 2024.
dc.subject.otherlanguageHarmonic distortion
dc.subject.otherlanguageJunctionless nanowire transistors
dc.subject.otherlanguageLinearity
dc.subject.otherlanguageTunable resistor
dc.titleThe roles of the gate bias, doping concentration, temperature and geometry on the harmonic distortion of junctionless nanowire transistors operating in the linear regime
dc.typeArtigo
fei.scopus.citations0
fei.scopus.eid2-s2.0-84919780372
fei.scopus.updated2024-07-01
fei.scopus.urlhttps://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=84919780372&origin=inward
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